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SPT Signal Processing Technologies
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| Part No. |
SPT7755AIK
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| OCR Text |
...1.5 v clock pulse width high (t pwh ) i 0.67 0.5 0.67 0.5 ns clock pulse width low (t pwl ) i 0.67 0.5 0.67 0.5 ns digital outputs logic "1" voltage i -1.1 -0.9 -1.1 -0.9 v logic "0" voltage i -1.8 -1.5 -1.8 -1.5 v rise time 20 to 80% v 450... |
| Description |
8-bit, 750 MSPS flash A/D converter
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| File Size |
106.25K /
8 Page |
 View
it Online |
Download Datasheet
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Motorola
ONSEMI[ON Semiconductor]
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| Part No. |
AND8090 AND8090D MC100H601 MC100H601FN MC10H106FN NBSG111BA NBSG11BAR2 NBC12429FAR2 NBSG53ABAR2 MC100EP016AFAR2 MC100EP809FAR2 MC10SX1190 MC100LVE222 MC10EP451FAR2 NB100ELT23LDTR2 MC10EP131FA MC100LVEL30 MC10H165FNR2 MC100E210FN MC100EL12DT MC100EP105FAR2 MC10H106FNR2
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| OCR Text |
...H * VOL
VOH LOW VOUTpp VOL 50% pwh PWL
50% duty cycle input. A 50% duty cycle input/output is shown in Figure 9. Note that the HIGH and LOW pulse widths (pwh and PWL respectively) are equal for a 50% duty cycle signal.
HIGH 50%
Fift... |
| Description |
3.3V / 5V ECL Quad 2-Input Differential AND/NAND
5V ECL Low Impedance Driver
LOW VOLTAGE DUAL 1:4, 1:5 DIFFERENTIAL FANOUT BUFFER
8 Input Priority Encoder
3.3V ECL Triple D-Type Flip-Flop with Set and Reset
3.3V / 5V ECL Quad D Flip Flop with Set, Reset, and Differential Clock
3.3V Dual Differential LVPECL to LVTTL Translator
3.3V / 5V ECL 6-Bit Differential Register with Master Reset
3.3V ECL 1:15 Differential ÷1/÷2 Clock Driver
Fibre Channel Coaxial Cable Driver and Loop Resillency Circuit
3.3 V 1:9 Differential HSTL/PECL to HSTL Clock Driver with LVTTL Clock Select and Enable
3.3V / 5V ECL 8-Bit Synchronous Binary Up Counter
2.5 V/3.3 V SiGe Selectable Differential Clock and Data D Flip-Flop/Clock Divider with Reset and OLS
3.3V / 5V Programmable PLL Synthesized Clock Generator (25 to 400 MHz)
2.5 V/3.3 V SiGe 1:2 Differential Clock Driver with RSECL Outputs
2.5 V/3.3 V SiGe 1:10 Differential Clock Driver with RSECL Outputs
Triple 4-3-3-Input NOR Gate
9-Bit ECL-TTL Translator
AC Characteristics of ECL Devices
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| File Size |
896.76K /
20 Page |
View
it Online |
Download Datasheet |
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SPT Signal Processing Technologies
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| Part No. |
SPT5510SIM
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| OCR Text |
... iv 0.5 ns clock pulse width (t pwh ) iv 1.5 ns 3 ref amp bandwidth is limited by its compensation network test level codes all electrical characteristics are subject to the following conditions: all parameters having min/max specifi- catio... |
| Description |
16-bit, 200 MWPS ECL D/A converter
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| File Size |
81.54K /
8 Page |
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it Online |
Download Datasheet |
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SPT Signal Processing Technologies
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| Part No. |
SPT9712AIP SPT9712BIP
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| OCR Text |
...tch pulse width ? t pwl , t pwh +25 c iv 5.0 4.0 5.0 4.0 ns
spt 4 2/15/01 spt9712 theory of operation the spt9712 uses a segmented architecture incorporat- ing most significant bit (msb) decoding. the four msbs (d1?d4) are decoded to ... |
| Description |
12-bit, 100 MWPS ECL D/A converter
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| File Size |
52.39K /
7 Page |
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it Online |
Download Datasheet |
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SPT Signal Processing Technologies
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| Part No. |
SPT9713AIP SPT9713BIP
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| OCR Text |
...tch pulse width ? t pwl , t pwh +25 c iv 5.0 4.0 5.0 4.0 ns
spt 4 2/15/01 spt9713 theory of operation the spt9713 uses a segmented architecture incorporat- ing most significant bit (msb) decoding. the four msbs (d1?d4) are decoded to ... |
| Description |
12-bit, 100 MWPS TTL D/A converter
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| File Size |
53.10K /
7 Page |
View
it Online |
Download Datasheet |
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