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Atmel Corp.
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| Part No. |
AT76C651
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| OCR Text |
...red to set this mode. phase and additive noise estimation phase noise and additive noise estimations are performed. this information can be used to select the best carrier loop bandwidth giving the best trade-off between phase noise and add... |
| Description |
Digital Reception/Transmission Integrated DVB compliant QAM Demodulator(兼容DVB的正交振幅调制解调电
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| File Size |
298.16K /
37 Page |
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it Online |
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ICS
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| Part No. |
ICS853013
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| OCR Text |
...gation delay: 570ps (maximum) * additive phase jitter, RMS: 0.03ps (typical) * LVPECL mode operating voltage supply range: VCC = 2.375V to 5.25V * ECL mode operating voltage supply range: VCC = 0V, VEE = -5.25V to -2.375V * -40C to 85C ambi... |
| Description |
Low Skew, Dual, 1-to-3, Differentialto-LVPECL/ECL Fanout Buffer. Industrial Temperature.
From old datasheet system
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| File Size |
230.38K /
15 Page |
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it Online |
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ICS
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| Part No. |
ICS85301
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| OCR Text |
...to-part skew: 150ps (maximum) * additive phase jitter, RMS: 0.009ps (typical) * Full 3.3V or 2.5V operating supply * Lead-Free package fully RoHS compliant * -40C to 85C ambient operating temperature
GENERAL DESCRIPTION
The ICS85301 is ... |
| Description |
2:1 Differential-to-LVPECL Multiplexer. Industrial Temperature
From old datasheet system
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| File Size |
289.79K /
19 Page |
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it Online |
Download Datasheet |
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Integrated Device Techn...
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| Part No. |
74FCT38074S
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| OCR Text |
... 74fct38074s ha s best in class additive phase jitter of sub 50 fsec. idt makes many non-pll and pll based low skew output devices as well as zero delay buffers to synchronize clocks. contact us for all of your clocking needs. features ... |
| Description |
Low additive phase jitter RMS
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| File Size |
111.60K /
11 Page |
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it Online |
Download Datasheet |
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AD
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| Part No. |
AD9511BCPZ-REEL7
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| OCR Text |
...ependent 1.2 GHz LVPECL outputs additive output jitter 225 fs rms 2 independent 800 MHz/250 MHz LVDS/CMOS clock outputs additive output jitter 275 fs rms Fine delay adjust on 1 LVDS/CMOS output 4-wire or 3-wire serial control port Space-sav... |
| Description |
1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Five Outputs
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| File Size |
776.31K /
60 Page |
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it Online |
Download Datasheet |
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ICS
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| Part No. |
ICS853L022
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| OCR Text |
...gation Delay: 450ps (typical) * additive phase jitter, RMS: 0.03ps (typical) * LVPECL mode operating voltage supply range: VCC = 3.0V to 3.8V, VEE = 0V * ECL mode operating voltage supply range: VCC = 0V, VEE = -3.8V to -3.0V * -40C to 85C ... |
| Description |
Dual, 1-to-1, LVCMOS/LVTTL-to-LVPECL Translator. Industrial Temperature
From old datasheet system
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| File Size |
207.38K /
11 Page |
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it Online |
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Integrated Device Techn...
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| Part No. |
74FCT38072S
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| OCR Text |
... 74fct38072s ha s best in class additive phase jitter of sub 50 fsec. idt makes many non-pll and pll based low skew output devices as well as zero delay buffers to synchronize clocks. contact us for all of your clocking needs. features ... |
| Description |
Low additive phase jitter RMS
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| File Size |
112.25K /
11 Page |
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it Online |
Download Datasheet |
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Price and Availability
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