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				Integrated Circuit Syst... ICST[Integrated Circuit Systems] http://
Part No.	ICS9248-192 ICS9248YG-192-T
OCR Text	...stal output Asynchronous active low input pin used to power down the device into a low power state. The internal clocks are disabled and the VCO and the crystal are stopped. The latency of the power down will not be greater than 3ms. 3.3V P...
Description	Single Chip Clock for Transmeta Frequency Timing Generator for Transmeta Systems
File Size	102.92K / 12 Page	View it Online	Download Datasheet

				ICST[Integrated Circuit Systems]
Part No.	ICS9248-20 ICS9248F-20 AV9248F-20
OCR Text	...after power-up. PD# pin enables low power mode by stopping crystal OSC and PLL stages. Other power management features include CPU_STOP#, wh...latency of Power Down will not be greater than 3ms. CPU_STOP# This is a synchronous active Low Input...
Description	Pentium/PRO system clock chip Pentium/ProTM System Clock Chip
File Size	340.17K / 11 Page	View it Online	Download Datasheet

				Integrated Device Technology, Inc. ICST[Integrated Circuit Systems]
Part No.	ICS9248-50 ICS9248YG-50-T ICS9248YG-50LF-T
OCR Text	...driving pin 26, SPREAD# active (Low) at power-on. Spread spectrum typically reduces system EMI by 8dB to 10dB. This simplifies EMI qualifica...latency of the power down will not be greater than 3ms. Asynchronous active low input pin used to st...
Description	100 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28 6.10 MM, 0.65 MM PITCH, TSSOP-28 Frequency Timing Generator for Pentium II Systems 频率的奔腾II系统时序发生
File Size	260.46K / 11 Page	View it Online	Download Datasheet

				ICST[Integrated Circuit Systems] http://
Part No.	ICS9248-55 ICS9248BF-55
OCR Text	...after power-up. PD# pin enables low power mode by stopping crystal OSC and PLL stages. Other power management features include CPU_STOP#, wh...Latency No. of rising edges of free running PCICLK 1 1 1 1 3ms 2max CPU_ STOP# PCI_STOP# PD# 0...
Description	Pentium/Pro/IITM System Clock Chip 奔腾/专业/ IITM系统时钟芯片 BX Main Clock, Supports 66.6 - 100MHz
File Size	268.23K / 10 Page	View it Online	Download Datasheet

				TE Connectivity, Ltd. Integrated Device Technology, Inc. ICST[Integrated Circuit Systems]
Part No.	ICS9248-56 ICS9248YG-56-T ICS9248YG-56LF-T ICS9248F-56
OCR Text	...driving pin 26, SPREAD# active (Low) at power-on. Spread spectrum typically reduces system EMI by 8dB to 10dB. This simplifies EMI qualifica...latency of the power down will not be greater than 3ms. Asynchronous active low input pin used to st...
Description	Peripheral IC 外围芯片 100 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28 4.40 MM, 0.65 MM PITCH, TSSOP-28 20-Bit Buffers/Drivers With 3-State Outputs 56-TSSOP -40 to 85 Frequency Generator & Integrated Buffers Frequency Timing Generator for Pentium II Systems BX Mobile Main Clock with Real Time Spread, Supports 66.6 - 100MHz
File Size	262.48K / 11 Page	View it Online	Download Datasheet

				ICST[Integrated Circuit Systems]
Part No.	ICS9248-61 ICS9248F-61 AV9248F-61
OCR Text	...driving pin 26, SPREAD# active (Low) at power-on. Spread spectrum typically reduces system EMI by 8dB to 10dB. This simplifies EMI qualifica...latency of the power down will not be greater than 3ms. Asynchronous active low input pin used to st...
Description	Frequency timing generator for Pentium II system BX Mobile Main Clock with Power Management Feature, Supports 66.6 - 100MHz Frequency Timing Generator for Pentium II Systems Frequency Generator & Integrated Buffers
File Size	288.93K / 9 Page	View it Online	Download Datasheet

				Integrated Device Technology, Inc. ICST[Integrated Circuit Systems]
Part No.	ICS9248-65 ICS9248YF-65 9248YF-65
OCR Text	... spectrum enable option. Active low = spread spectrum clocking enable. Active high = spread spectrum clocking disable. Asynchronous active l...latency requirement next page. 2. On means active. 3. PD# pulled Low, impacts all outputs including ...
Description	PROC SPECIFIC CLOCK GENERATOR, PDSO48 SSOP-48 20-Bit Buffers/Drivers With 3-State Outputs 56-TSSOP -40 to 85 Frequency Generator & Integrated Buffers Frequency Timing Generator for PENDIUM II Systems 820 Single Chip Clock, Supports 100 - 133MHz
File Size	263.77K / 10 Page	View it Online	Download Datasheet

				Integrated Device Technology, Inc. ICST[Integrated Circuit Systems]
Part No.	ICS9248-66 ICS9248YF-66 ICS9248YF-66LF
OCR Text	...d CPU/2 outputs. High = 133MHz, Low=100MHz Fixed 48MHz clock output. 3.3V Function select pins. See truth table for details. Enables spread ...latency requirement next page. 2. On means active. 3. PD# pulled Low, impacts all outputs including ...
Description	133.3 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 SSOP-48 Frequency Timing Generator for PENTIUM II Systems 820 Single Chip Clock, Supports 100 - 133MHz
File Size	378.95K / 11 Page	View it Online	Download Datasheet

				ICST[Integrated Circuit Systems]
Part No.	ICS9248-72 ICS9248YF-72
OCR Text	...48/24 MHz select option. Active low = 48 MHz output. Active High = 24 MHz 3.3V 48 or 24 MHz clock output, fixed frequency clock typically us...latency requirement next page. 2. On means active. 3. PD# pulled Low, impacts all outputs including ...
Description	Frequency Timing Generator for PENTIUM II Systems
File Size	519.05K / 12 Page	View it Online	Download Datasheet

				SpecTek
Part No.	P2M648YL
OCR Text	...nputs v ih 2.0 vcc + .3 v input low (logic 0) voltage, all inputs v il -0.3 0.8 v input leakage current any input = 0v < vin < vcc all othe...latency is reduced. this is because maximum cycle rate is slower as cas latency is re duced. 3. ad...
Description	SDRAM Module
File Size	89.13K / 5 Page	View it Online	Download Datasheet

For low-latency Found Datasheets File :: 10767 Search Time::1.656ms
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