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  positive-nor Datasheet PDF File

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    74AHC1G02W5-7 74AHC1G0211 74AHC1G02SE 74AHC1G02SE-7

Diodes Incorporated
Part No. 74AHC1G02W5-7 74AHC1G0211 74AHC1G02SE 74AHC1G02SE-7
OCR Text POSITIVE NOR GATE Description The 74AHC1G02 is a single 2-input positive NOR gate with a standard push-pull output. The device is designed for operation with a power supply range of 2.0V to 5.5V. The gate performs the positive Boolean f...
Description SINGLE 2 INPUT POSITIVE NOR GATE

File Size 196.49K  /  8 Page

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    PO54G02A PO54G02AFU PO54G02ALU PO74G02ASR PO74G02ASU

Potato Semiconductor Corporation
Part No. PO54G02A PO54G02AFU PO54G02ALU PO74G02ASR PO74G02ASU
OCR Text positive-nor GATES 54, 74 Series GHz Logic FEATURES: . Patented technology . Specified From -40C to 85C, -40C to 125C, and -55C to 125C . Operating frequency up to 900MHz with 2pf load . Operating frequency up to 700MHz with 5pf load ....
Description QUADRUPLE 2-INPUT positive-nor GATES

File Size 549.38K  /  6 Page

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    74LVC1G021012 74LVC1G02FZ4

Diodes Incorporated
Part No. 74LVC1G021012 74LVC1G02FZ4
OCR Text POSITIVE NOR GATE Description The 74LVC1G02 is a single 2-input positive NOR gate with a standard totem pole output. The device is designed for operation with a power supply range of 1.65V to 5.5V. The inputs are tolerant to 5.5V allowi...
Description SINGLE 2 INPUT POSITIVE NOR GATE

File Size 237.32K  /  14 Page

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    NB7L86MMNR2G NB7L86MMNR2 NB7L86M NB7L86MMN NB7L86MMNG

ONSEMI[ON Semiconductor]
Part No. NB7L86MMNR2G NB7L86MMNR2 NB7L86M NB7L86MMN NB7L86MMNG
OCR Text ... LVNECL (Negative ECL), LVPECL (Positive ECL), LVCMOS, LVTTL, CML, or LVDS. The differential 16 mA CML output provides matching internal 50 ...NOR TRUTH TABLE (Note 4) m D0 0 0 1 1 D1 1 1 1 1 b SEL 0 1 0 1 m or b Q 0 1 1 1 4. D0, D1, SEL a...
Description 2.5V/3.3V 12 Gb/s Differential Clock/Data SmartGate with CML Output and Internal Termination

File Size 1,720.25K  /  12 Page

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    ONSEMI[ON Semiconductor]
Part No. NBSG86A NBSG86AMNR2 NBSG86AMN NBSG86ABAR2 NBSG86ABA
OCR Text ...cept NECL (Negative ECL), PECL (Positive ECL), LVCMOS/LVTTL, CML, or LVDS. The OLS input is used to program the peak-to-peak output amplitud...NOR TRUTH TABLE** m D0 0 0 1 1 D1 1 1 1 1 b SEL 0 1 0 1 m or b Q 0 1 1 1 ** D0, D1, SEL are inve...
Description 2.5V/3.3V SiGe Differential Smart Gate with Output Level Select
2.5V/3.3VSiGe Differential Smart Gate with Output Level Select
Evaluation Board Manual

File Size 113.78K  /  14 Page

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    SN74LS74A SN74LS74AD SN74LS74AN 74LS74 ON2953 SN74LS74

ONSEMI[ON Semiconductor]
Part No. SN74LS74A SN74LS74AD SN74LS74AN 74LS74 ON2953 SN74LS74
OCR Text Positive Edge-Triggered Flip-Flop The SN74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type ...nor for more than 1 second. AC CHARACTERISTICS (TA = 25C, VCC = 5.0 V) Limits Symbol fMAX tPLH t...
Description    LOW POWER SCHOTTKY
From old datasheet system

File Size 102.74K  /  8 Page

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