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pmc
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| Part No. |
2001500
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| OCR Text |
...n pure Serializer-Deserializer (serdes) mode.
RCLK[3:0]
* Supports line loopback from the line side receive stream to the transmit stream and diagnostic loopback from the system side transmit interface to the system side receive stream ... |
| Description |
From old datasheet system
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| File Size |
26.82K /
2 Page |
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it Online |
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PMC[PMC-Sierra, Inc]
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| Part No. |
1991129 PM3386 PM3386-BI
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| OCR Text |
...ics with qualified values Added serdes Mode Added GMII/TBI Mode Modified timing contained within serdes Transmit Data Timing Modified timing contained within serdes Received Data Timing 6 5 4 3 2 1 Feb 2001 Dec 2000 June 2000 May 2000 Nov 1... |
| Description |
DUAL GIGABIT ETHERNET CONTROLLER
From old datasheet system
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| File Size |
2,348.92K /
315 Page |
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it Online |
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pmc
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| Part No. |
2001398
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| OCR Text |
...ndard product is a dual channel serdes and GMAC with embedded FIFOs that provides a high density and low power Gigabit Ethernet solution for direct connection to electrical optical modules. The device also provides a standard GMII interface... |
| Description |
From old datasheet system
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| File Size |
177.63K /
19 Page |
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it Online |
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ICS
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| Part No. |
ICS874003
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| OCR Text |
...idth modes. Because some 2.5 Gb serdes have x20 multipliers while others have than x25 multipliers, the 874003 can be set for 1:1 mode or 5/4 multiplication mode (i.e. 100MHz input/125MHz output) using the FSEL pins.
FEATURES
* (3) Diff... |
| Description |
High Performance Differential-to-LVDS Jitter Attenuator for PCI Express?
From old datasheet system
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| File Size |
185.07K /
10 Page |
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it Online |
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MAXIM[Maxim Integrated Products]
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| Part No. |
MAX9205 MAX9207 MAX9205-MAX9207 MAX9207EAI MAX9205EAI
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| OCR Text |
...s
o Standalone Serializer (vs. serdes) Ideal for Unidirectional Links o Framing Bits for Deserializer Resync Allow Hot Insertion Without System Interruption o LVDS Serial Output Rated for Point-to-Point and Bus Applications o Wide Referenc... |
| Description |
10-Bit Bus LVDS Serializers
From old datasheet system
"10-Bit, Bus LVDS Serializers"
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| File Size |
176.92K /
13 Page |
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it Online |
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PMC-SIERRA
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| Part No. |
PM7832
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| OCR Text |
...ovides integrated rate-adaptive serdes links along with CPRI framing, mapping, switching, combining, and integrated clock jitter attenuation functions. When used in conjunction with the 6-port PM7830 BRIC, the BRIC and BRIC-2 can be used to... |
| Description |
Two Port Baseband Radio Interface Controller
From old datasheet system
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| File Size |
99.02K /
2 Page |
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it Online |
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Intel
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| Part No. |
TXN17401
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| OCR Text |
...0Gbps Serializer/ Deserializer (serdes) XENPAK transceiver is designed to provide an IEEE802.3ae, draft 4.0-compliant 10.3Gbps interface between the photonic physical layer and the electrical section layer. The module is comprised of an opt... |
| Description |
10Gbps Optical Serializer/Deserializer XENPAK Transceiver
From old datasheet system
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| File Size |
297.05K /
2 Page |
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it Online |
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Price and Availability
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