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Nanya Technology, Corp.
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| Part No. |
NT5DS8M16FS-75B
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| OCR Text |
...s a double-data-rate architec- ture to achieve high-speed operation. the double data rate architecture is essentially a 2n prefetch architecture with an interface designed to transfer two data words per clock cycle at the i/o pins. a ... |
| Description |
8M X 16 DDR DRAM, 0.75 ns, PDSO66 0.400 INCH, GREEN, PLASTIC, TSOP2-66
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| File Size |
2,090.89K /
73 Page |
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it Online |
Download Datasheet
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Nanya Technology, Corp.
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| Part No. |
NT5DS8M16FT-43
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| OCR Text |
...s a double-data-rate architec- ture to achieve high-speed operation. the double data rate architecture is essentially a 2n prefetch architecture with an interface designed to transfer two data words per clock cycle at the i/o pins. a ... |
| Description |
8M X 16 DDR DRAM, 0.6 ns, PDSO66 0.400 INCH, PLASTIC, TSOP2-66
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| File Size |
2,240.18K /
74 Page |
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it Online |
Download Datasheet |
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M.S. Kennedy, Corp.
MS KENNEDY CORP
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| Part No. |
MSK5251-1.2E MSK5251-0.9E MSK5251-1.0H MSK5251-1.5H
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| OCR Text |
...ect a maximum junction tempera- ture. the equation may now be arranged to solve for the required heat sink to ambient thermal resistance (r q sa). example: an msk 5251-1.3 is configured for vin=+3.4v and vout=+1.3v. iout is a continuous 5a... |
| Description |
HIGH CURRENT, VERY LOW OUTPUT SURFACE MOUNT VOLTAGE REGULATORS 1.2 V FIXED POSITIVE REGULATOR, CBCC3
HIGH CURRENT, VERY LOW OUTPUT SURFACE MOUNT VOLTAGE REGULATORS 0.9 V FIXED POSITIVE REGULATOR, CBCC3
HIGH CURRENT, VERY LOW OUTPUT SURFACE MOUNT VOLTAGE REGULATORS 1 V FIXED POSITIVE REGULATOR, CBCC3
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| File Size |
763.83K /
5 Page |
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it Online |
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Price and Availability
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