|
|
|
Advanced Micro Devices, Inc.
|
Part No. |
PALCE29MA16
|
OCR Text |
.../ le polarity n register/latch preload permits full logic verification n high speed (t pd = 25 ns, f max = 33 mhz and f max internal = 50 mhz) n full-function ac and dc testing at the factory for high programming and functional yiel... |
Description |
24-Pin EE CMOS Programmable Array Logic
|
File Size |
295.17K /
25 Page |
View
it Online |
Download Datasheet |
|
|
|
LATTICE SEMICONDUCTOR CORP
|
Part No. |
PALCE20RA10H-10PC PALCE20RA10H-10JC
|
OCR Text |
... ttl logic n ttl-level register preload for testability n extensive third-party software and programmer support through fusionpld partners n 24-pin pdip and 28-pin plcc packages save space n 7.5 ns, 10 ns, and 15 ns versions utilize split l... |
Description |
EE PLD, 10 ns, PDIP24 EE PLD, 10 ns, PQCC28
|
File Size |
162.35K /
13 Page |
View
it Online |
Download Datasheet |
|
|
|
Atmel, Corp.
|
Part No. |
ATF22LV10CQZ
|
OCR Text |
...cleared upon power-up. register preload simplifies testing. a security fuse prevents unauthorized copying of programmed fuse patterns. absolute maximum ratings* temperature under bias .................................. -40 c to +85 c *not... |
Description |
ASIC 专用集成电路
|
File Size |
235.10K /
13 Page |
View
it Online |
Download Datasheet |
|
Price and Availability
|