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				Integrated Device Techn...
Part No.	8SLVP1102I 8SLVP1102I-18 8SLVP1102ANLGI 8SLVP1102ANLGI8
OCR Text	...ut of high-frequency, very low additive phase-noise clock and data signals. the idt8slvp1102i is characterized to operate from a 3.3v or 2.5v power supply. guaranteed output-to-output and part-to-part skew characteristics make the idt8...
Description	LVPECL Output Fanout Buffer
File Size	434.28K / 21 Page	View it Online	Download Datasheet

				ANALOG DEVICES INC
Part No.	AD9522-0/PCBZ AD9522-0BCPZ
OCR Text	...-to-32 divider with phase delay additive broadband jitter as low as 242 fs rms Channel-to-channel skew grouped outputs < 60 ps Each LVDS output can be configured as 2 CMOS outputs (for fOUT 250 MHz) Automatic synchronization of all outputs...
Description	12 LVDS/24 CMOS Output Clock Generator with Integrated 2.8 GHz VCO OTHER CLOCK GENERATOR, QCC64
File Size	921.75K / 84 Page	View it Online	Download Datasheet

				Integrated Device Technology
Part No.	ICS854S013 ICS854S013BG ICS854S013BGLFT ICS854S013BGT ICS854S013BGLF
OCR Text	...typical) Propagation delay: TBD additive phase jitter, RMS: 0.15ps (typical) Full 3.3V power supply 0C to 70C ambient operating temperature Available in both standard (RoHS 5) and lead-free (RoHS 6) packages ICS Block Diagram QA0 nQA...
Description	LOW SKEW, DUAL, 1-TO-3 DIFFERENTIAL-TO-LVDS FANOUT BUFFER
File Size	658.15K / 14 Page	View it Online	Download Datasheet

				Integrated Device Techn...
Part No.	5PB1206NDGK
OCR Text	...y current consumption ? low rms additive phase jitter ? family supports 1.8v to 3.3v power supply voltage: ? for 1.8v supply: 5pb1203, 5pb1204, 5pb1206 ? for 2.5v / 3.3v supply: 5pb1213, 5pb1214, 5pb1216 ? three, four, and six outputs with ...
Description	3-Channel High-Performance TCXO/LVCMOS Clock Buffer Family
File Size	304.05K / 15 Page	View it Online	Download Datasheet

				Analog Devices
Part No.	AD9508-17
OCR Text	...m jitter (see figure 25 ) additive output jitter: 41 fs rms typical (12 khz to 20 mhz) excellent o utpu t- to - output isolation automatic synchronization of all outputs single 2.5 v/3.3 v power supply internal ldo...
Description	1.65 GHz Clock Fanout Buffer
File Size	990.55K / 40 Page	View it Online	Download Datasheet

				TriQuint Semiconductor
Part No.	TGA4956-SM
OCR Text	additive RMS Jitter < 1.5 psec High Gain > 32 dB Adjustable Output Amplitude 3 Vpp - 7 Vpp Low Power Dissipation, <0.42 W Rise/Fall Times <25 psec Integrated High Frequency Bias-Tee 3.3 V, 120 mA Bias (3 Vpp output) 5 V, 200 mA Bias (6 Vpp ...
Description	3 V - 7 V Optical Modulator Driver
File Size	1,021.90K / 7 Page	View it Online	Download Datasheet

				Integrated Device Techn...
Part No.	9DML0441
OCR Text	...-output skew < 50ps ? pcie gen4 additive phase jitter is < 0.1 ps rms ? 12khz?20mhz additive phase jitter 285fs rms typical at156.25mhz block diagram note: resistors default to internal on xx41/xx51 devices. p1 dev ices have programmable ...
Description	2:4 3.3V PCIe Clock Mux
File Size	227.48K / 10 Page	View it Online	Download Datasheet

				Integrated Circuit Syst... ICST[Integrated Circuit Systems]
Part No.	ICS5310AI31L ICS85310I-31 ICS85310AYI31 ICS85310AYI-31 ICS85310AYI-31LF ICS85310AYI-31LFT ICS85310AYI-31T
OCR Text	...gation delay: 1.7ns (typical) * additive phase jitter, RMS: <0.13ps (typical) * LVPECL mode operating voltage supply range: VCC = 2.375V to 3.8V, VEE = 0V * ECL mode operating voltage supply range: VCC = 0V, VEE = -3.8V to -2.375V * -40C to...
Description	LOW SKEW, DUAL, 1-TO-5 2.5V/3.3V DIFFERENTIAL-TO-ECL/LVPECL FANOUT BUFFER
File Size	190.43K / 16 Page	View it Online	Download Datasheet

				Integrated Device Techn...
Part No.	IDT5T30553
OCR Text	...to 0.8 v, c l =15 pf 1.0 1.5 ns additive period jitter 1 ps propagation delay note 1 2.2 3 5 ns output to output skew note 2 rising edges at vdd/2 0 50 ps device to device skew rising edges at vdd/2 500 ps parameter symbol conditions min. t...
Description	LOW SKEW 1 TO 4 CLOCK BUFFER
File Size	129.69K / 8 Page	View it Online	Download Datasheet

				Integrated Device Techn...
Part No.	ICS854110I
OCR Text	...t = 150k ? 16 mhz t jit buffer additive phase jitter, rms; refer to additive phase jitter section r set = 4k ?, f ref = 125mhz, integration range: 12khz ? 20mhz 0.291 ps t pd propagation delay; note 1 clkx, nclkx to any qx, nqx outp...
Description	2.5V Differential LVDS Clock Buffer
File Size	761.61K / 21 Page	View it Online	Download Datasheet

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