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C3500 S1T8501 2SK427Q BR201 43650 SIR808DP TL064CN A1452A
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    CY7C1413BV18-167BZC CY7C1413BV18-167BZI CY7C1413BV18-167BZXC CY7C1413BV18-167BZXI CY7C1413BV18-200BZC CY7C1413BV18-200BZ

Cypress Semiconductor
Part No. CY7C1413BV18-167BZC CY7C1413BV18-167BZI CY7C1413BV18-167BZXC CY7C1413BV18-167BZXI CY7C1413BV18-200BZC CY7C1413BV18-200BZI CY7C1415BV18-167BZC CY7C1415BV18-167BZI CY7C1415BV18-167BZXC CY7C1415BV18-167BZXI CY7C1415BV18-200BZC CY7C1415BV18-200BZI
OCR Text ...devices. Access to each port is through a common address bus. Addresses for read and write addresses are latched on alternate rising edges of the input (K) clock. Accesses to the QDR-II read and write ports are completely independent of one...
Description 36-Mbit QDR⑩-II SRAM 4-Word Burst Architecture

File Size 444.63K  /  30 Page

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    CY7C1351G-100AXC CY7C1351G-100AXI CY7C1351G-100BGC CY7C1351G-100BGI CY7C1351G-100BGXC CY7C1351G-100BGXI CY7C1351G-133AXC

Cypress Semiconductor
Part No. CY7C1351G-100AXC CY7C1351G-100AXI CY7C1351G-100BGC CY7C1351G-100BGI CY7C1351G-100BGXC CY7C1351G-100BGXI CY7C1351G-133AXC CY7C1351G-133AXI CY7C1351G-133BGC CY7C1351G-133BGI CY7C1351G-133BGXC CY7C1351G-133BGXI
OCR Text through SRAM with NoBLTM Architecture Features * Can support up to 133-MHz bus operations with zero wait states -- Data is transferred on every clock * Pin compatible and functionally equivalent to ZBTTM devices * Internally self-timed ou...
Description 4-Mbit (128K x 36) Flow-through SRAM with NoBL Architecture
4-Mbit (128K x 36) Flow-through SRAM with NoBL?/a> Architecture
4-Mbit (128K x 36) Flow-through SRAM with NoBL⑩ Architecture

File Size 395.70K  /  14 Page

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    CY7C1072AV33 CY7C1072AV33-10BBC CY7C1072AV33-10BBI CY7C1072AV33-12BBC CY7C1072AV33-12BBI

Cypress Semiconductor
Part No. CY7C1072AV33 CY7C1072AV33-10BBC CY7C1072AV33-10BBI CY7C1072AV33-12BBC CY7C1072AV33-12BBI
OCR Text ...ecified on the address pins (A0 through A19). If Byte Enable B (BB) is LOW, then data from I/O pins (I/O8 through I/O15) is written into the location specified on the address pins (A0 through A19). Likewise, BC and BD correspond with the I/...
Description 32-Mbit (1M x 32) Static RAM

File Size 143.27K  /  9 Page

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    CY7C1049BN-25VI CY7C1049BN-25VXI CY7C1049BNL-17VC CY7C1049BNL-20VC CY7C1049BNL-25VC CY7C1049BN-15VC CY7C1049BN-15VI CY7C

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Cypress Semiconductor
Part No. CY7C1049BN-25VI CY7C1049BN-25VXI CY7C1049BNL-17VC CY7C1049BNL-20VC CY7C1049BNL-25VC CY7C1049BN-15VC CY7C1049BN-15VI CY7C1049BN-20VI CY7C1049BN-20VXI CY7C1049BN-20VC CY7C1049BN-20VXC
OCR Text ...ata on the eight I/O pins (I/O0 through I/O7) is then written into the location specified on the address pins (A0 through A18). Reading from the device is accomplished by taking Chip Enable (CE) and Output Enable (OE) LOW while forcing Writ...
Description 512K x 8 Static RAM

File Size 453.14K  /  10 Page

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    CY62128DV30LL-55ZRXI CY62128DV30LL-55ZAXI CY62128DV30LL-70ZAXI CY62128DV30LL-55ZXI CY62128DV30 CY62128DV30L-55SI CY62128

Cypress Semiconductor
Part No. CY62128DV30LL-55ZRXI CY62128DV30LL-55ZAXI CY62128DV30LL-70ZAXI CY62128DV30LL-55ZXI CY62128DV30 CY62128DV30L-55SI CY62128DV30L-55ZAI CY62128DV30L-55ZI CY62128DV30L-55ZRI CY62128DV30L-70SI CY62128DV30L-70ZAI CY62128DV30L-70ZI CY62128DV30L-70ZRI CY62128DV30LL-55SI CY62128DV30LL-55SXI CY62128DV30LL-55ZAI CY62128DV30LL-55ZI CY62128DV30LL-55ZRI CY62128DV30LL-70ZAI
OCR Text ...OW. The input/output pins (I/O0 through I/O7) are placed in a high-impedance state when: deselected Chip Enable 1 (CE1) HIGH or Chip Enable 2 (CE2) LOW, outputs are disabled (OE HIGH), or during a write operation (Chip Enable 1 (CE1) LOW an...
Description 1-Mb (128K x 8) Static RAM

File Size 570.33K  /  11 Page

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    CY28405 CY28405OC CY28405OCT CY28405OXC CY28405OXCT

SpectraLinear Inc
Part No. CY28405 CY28405OC CY28405OCT CY28405OXC CY28405OXCT
OCR Text ...z Clock Output. 3.3V selectable through external SELVCH strapping resistor and SMBus to be 66-MHz or 48-MHz. Default is 66-MHz. 0 = 66 MHz, 1 = 48 MHz 66-MHz Clock Output. 3.3V 66-MHz clock from internal VCO. Reset or Power-down Mode Select...
Description CK409-Compliant Clock Synthesizer

File Size 194.48K  /  18 Page

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    LINEAR TECHNOLOGY CORP
Part No. LTM2881HV-3PBF
OCR Text ...rs both sides of the interface through an integrated, isolated, low noise, efficient 5v output dc/dc converter. coupled inductors and an isolation power transformer provide 2500v rms of isolation between the line transceiver and the lo...
Description LINE TRANSCEIVER, PBGA32

File Size 304.44K  /  22 Page

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    CY223811FXI CY22381FSZC CY2238108 CY22381SXI-XXX CY3672-USB CY22381SXC-XXX CY22381SXI-XXXT CY22381SXC-XXXT

Cypress Semiconductor
Part No. CY223811FXI CY22381FSZC CY2238108 CY22381SXI-XXX CY3672-USB CY22381SXC-XXX CY22381SXI-XXXT CY22381SXC-XXXT
OCR Text ...trength Frequency select option through external LVTTL Input 3.3V operation Eight-pin SOIC package CyClocks RTTM support Improves frequency accuracy over temperature, age, process, and initial offset Non-volatile programming enables easy...
Description Three-PLL General Purpose FLASH Programmable Clock Generator

File Size 294.60K  /  9 Page

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    M34552MXH-XXXFP M34552M4H-XXXFP 4552

Renesas Electronics Corporation
Part No. M34552MXH-XXXFP M34552M4H-XXXFP 4552
OCR Text ...lation frequency, in high-speed through-mode) One Time PROM version ................................................... 0.68 s (at 4.4 MHz oscillation frequency, in high-speed through-mode) qSupply voltage Mask ROM version ....................
Description SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

File Size 1,044.82K  /  145 Page

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