16 bits x 2 banks, Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock...Bit x 2 Banks Features
*Single 3.3V +/- 0.3V power supply *MRS Cycle with address key programs -CAS...
Description
Synchronous DRAM(512K X 16 Bit X 2 Banks) 同步DRAM(为512k × 16位2组)