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INTEGRATED DEVICE TECHNOLOGY INC
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Part No. |
ICS85314BMI-01T
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OCR Text |
...ended clk1 can accept lvcmos or lvttl input levels. the clock enable is internally synchronized to eliminate runt clock pulses on the outputs during asynchronous assertion/deassertion of the clock enable pin. guaranteed output and part-to-p... |
Description |
85314 SERIES, LOW SKEW CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20
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File Size |
235.71K /
19 Page |
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it Online |
Download Datasheet |
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INTEGRATED DEVICE TECHNOLOGY INC
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Part No. |
ICS840AG-125T
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OCR Text |
lvttl o scillator r eplacement g eneral d escription the ics840-125 is a gigabit ethernet oscillator replacement and a member of the hiper...lvcmos/lvttl output, 15 output impedance ? crystal oscillator interface designed for 25mhz, 18pf p... |
Description |
125 MHz, OTHER CLOCK GENERATOR, PDSO8
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File Size |
154.79K /
10 Page |
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it Online |
Download Datasheet |
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INTEGRATED DEVICE TECHNOLOGY INC
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Part No. |
MC100ES6535DTR2 MC100ES6535EJ
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OCR Text |
...le inpu ts that allow lvcmos or lvttl input levels which translate to lvpecl outputs. the clock enable is internally synchronized to eliminate runt pulses on the outputs during asynchronous assertion/deassertion of the clock enable pin. ... |
Description |
100E SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20
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File Size |
642.97K /
8 Page |
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it Online |
Download Datasheet |
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Price and Availability
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