| |
|
 |
|
| Part No. |
MT48H4M32LFB5-75ITK
|
| OCR Text |
...ress can be changed every clock cycle ? 4 internal banks for concurrent operation ? programmable burst lengths (bl): 1, 2, 4, 8, and con- tinuous ? auto precharge, includes concurrent auto precharge ? auto refresh and self refresh modes ? l... |
| Description |
4M X 32 SYNCHRONOUS DRAM, 5.4 ns, PBGA90
|
| File Size |
2,412.95K /
86 Page |
 View
it Online |
Download Datasheet
|
| |
|
|
Kersemi Electronic Co., Ltd.
|
| Part No. |
VS-MBR15
|
| OCR Text |
... per device 15 maximum peak one cycle non-repetitive surge i fsm 5 s sine or 3 s rect. pulse following any rated load condition and with rated v rrm applied 690 surge applied at rated load conditions halfwave, single phase, 60 hz 150 n... |
| Description |
Low forward voltage drop
|
| File Size |
1,952.23K /
5 Page |
View
it Online |
Download Datasheet |
| |
|
|
ALLIANCE MEMORY INC
|
| Part No. |
U62H256ASK55G1
|
| OCR Text |
... outputs, are active. in a read cycle, the data outputs are activated by the falling edge of g , afterwards the data word will be available at the outputs dq0-dq7. after the address change, the data outputs go high-z until the new informati... |
| Description |
32K X 8 STANDARD SRAM, 55 ns, PDSO28
|
| File Size |
83.80K /
10 Page |
View
it Online |
Download Datasheet |
|
Price and Availability
|
