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  2 x 2 clock data switch buffer Datasheet PDF File

For 2 x 2 clock data switch buffer Found Datasheets File :: 150+       Page :: | 1 | 2 | 3 | 4 | 5 | 6 | <7> | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 |   

    IDT[Integrated Device Technology]
Integrated Device Technology, Inc.
HIROSE ELECTRIC Co., Ltd.
Part No. IDT2309A-1PGI IDT2309A IDT2309A-1DC IDT2309A-1DCG IDT2309A-1DCGI IDT2309A-1DCI IDT2309A-1HDC IDT2309A-1HDCG IDT2309A-1HDCGI IDT2309A-1HDCI IDT2309A-1HPG IDT2309A-1HPGG IDT2309A-1HPGGI IDT2309A-1HPGI IDT2309A-1PG IDT2309A-1PGG IDT2309A-1PGGI IDT2309A-1HDC8 IDT2309A-1HDCG8 IDT2309A-1HDCGI8 IDT2309A-1HDCI8 IDT2309A-1HPG8 IDT2309A-1DC8 IDT2309A-1DCI8
Description 3.3V ZERO DELAY clock buffer 2309 SERIES, PLL BASED clock DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
3.3V ZERO DELAY clock buffer 3.3零延迟时钟缓冲器

File Size 53.69K  /  8 Page

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    CY2309CZXI-1 CY2309CZXI-1H CY2309CZXI-1HT CY2309CZXI-1T CY2305CSXA-1HT CY2309CZXC-1 CY2305CSXI-1T CY2309CSXI-1T CY2305CS

Cypress Semiconductor, Corp.
Part No. CY2309CZxI-1 CY2309CZxI-1H CY2309CZxI-1HT CY2309CZxI-1T CY2305CSxA-1HT CY2309CZxC-1 CY2305CSxI-1T CY2309CSxI-1T CY2305CSxC-1HT CY2309CSxC-1HT CY2309CZxC-1HT CY2305CSxI-1HT CY2309CSxI-1HT CY2309CSxC-1T CY2309CZxC-1T CY2305CSxC-1T CYPRESSSEMICONDUCTORCORP-CY2309CSxI-1T
Description 3.3 V Zero Delay clock buffer
3.3V Zero Delay clock buffer 2309 SERIES, PLL BASED clock DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16

File Size 425.03K  /  17 Page

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    NB4L6254 NB4L6254FAG NB4L6254FAR2G NB4L6254D

ONSEMI[ON Semiconductor]
Part No. NB4L6254 NB4L6254FAG NB4L6254FAR2G NB4L6254D
Description 2.5V / 3.3V Differential LVPECL 2x2 clock switch and Low Skew Fanout buffer(2.5V / 3.3V差分LVPECL 2x2时钟开关和低失真输出缓冲器)

File Size 134.05K  /  9 Page

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    NB6HQ14M

ON Semiconductor
Part No. NB6HQ14M
Description 2.5V 5GHz / 6.5Gbps Differential Input to 1.8V /2.5V 1:4 CML clock / data Fanout buffer w/ Selectable Input Equalizer

File Size 1,254.74K  /  11 Page

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    NB4N840MMNR4G NB4N840MMNG NB4N840M

ONSEMI[ON Semiconductor]
Part No. NB4N840MMNR4G NB4N840MMNG NB4N840M
Description 3.3V 3.2Gb/s Dual Differential clock/data 2 x 2 Crosspoint switch with CML Output and Internal Termination

File Size 101.27K  /  9 Page

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    ONSEMI[ON Semiconductor]
Part No. NB4N840M07 NB4N840MMNR4G NB4N840M NB4N840MMNG
Description 3.3V 3.2Gb/s Dual Differential clock/data 2 x 2 Crosspoint switch with CML Output and Internal Termination

File Size 96.54K  /  9 Page

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    Cypress Semiconductor Corp.
Cypress Semiconductor, Corp.
Part No. CY7B991-2JxC CY7B991-2JCT CY7B992-2JCT CY7B992-7LMB27 CY7B991-7LMB27 CY7B991-5JIT CY7B991-5JxI CY7B991-2JxCT CY7B991-5JxIT CY7B991-5JxC CY7B992-5JIT CY7B991-7JxCT CY7B991-5JxCT CY7B992-5JxIT
Description Programmable Skew clock buffer 7B SERIES, PLL BASED clock DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC32
Programmable Skew clock buffer 可编程偏移时钟缓冲器

File Size 356.44K  /  19 Page

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Part No. UPD424280LLE-A80 UPD424280LLE-A70 UPD424280AG5M-80 UPD424280LG5M-A70 UPD424280LG5M-A60 UPD424280LV-A80 UPD424280LV-A60 UPD424280LV-A70 UPD42S4280ALE-80 UPD424280AV-80 UPD42S4280AV-80 UPD424280AG5-80 UPD42S4280LG5M-A70
Description x18 Fast Page Mode DRAM
Quad PLL clock Generator with Serial Interface (I2C)
Low-Cost 3.3V Spread Aware™ Zero Delay buffer
Mediaclock™ MPEG clock Generator with VCxO
Mediaclock™ PDP clock Generator
Field and Factory-Programmable Spread Spectrum clock Generator for EMI Reduction
HOTLink II™ SMPTE Receiver Training clock
3.3V Zero Delay buffer x18快速页面模式的DRAM

File Size 1,666.96K  /  32 Page

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    PO74HSTL85353A PO74HSTL85353ASR PO74HSTL85353ASU PO74HSTL85353A-14

Potato Semiconductor Corporation
Potato Semiconductor Corpor...
Part No. PO74HSTL85353A PO74HSTL85353ASR PO74HSTL85353ASU PO74HSTL85353A-14
Description The PO74HSTL85353A is a low-skew, 1-to-4 differential fanout buffer targeted to meet the requirements of high-performance clock and data distribution applications.
300MHz HSTL Potato Chip

File Size 1,426.51K  /  7 Page

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    Analog Devices, Inc.
Part No. AD802 AD800 AD800-52BR AD800-45BQ AD802-155BR AD802-155KR AD800-52BRRL
Description    clock Recovery and data Retiming Phase-Locked Loop
clock Recovery and data Retiming Phase-Locked Loop PHASE LOCKED LOOP, PDSO20
clock Recovery and data Retiming Phase-Locked Loop(时钟恢复和重定时PLL)
AD800/AD802: clock Recovery and data Retiming Phase-Locked Loop data Sheet (Rev. B. 12/93)
45 or 52 Mbps clock and data Recovery IC

File Size 255.24K  /  12 Page

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For 2 x 2 clock data switch buffer Found Datasheets File :: 150+       Page :: | 1 | 2 | 3 | 4 | 5 | 6 | <7> | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 |   

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