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ST Microelectronics
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| Part No. |
AN556
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| OCR Text |
...rward drop. the graph of fig. 9 helps design: you draw a line crossing the vl-p axis at v on-sense and read the resistor value on the other two axes. the divider is tuned by solving equations [3a] and [3b]. the example shows how to set the ... |
| Description |
THE L6353: A SMART GATE DRIVER
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| File Size |
230.84K /
16 Page |
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Allegro MicroSystems, Inc.
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| Part No. |
1345CNPD
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| OCR Text |
...ions on separate layers, which helps minimize the coupling of unwanted signal noise into the power supplies of the receiver. layout considerations a fiber-optic receiver employs a very high-gain, wide- bandwidth transimpedance amplifier. ... |
| Description |
FIBER OPTIC RECEIVER 光纤接收
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| File Size |
73.78K /
12 Page |
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it Online |
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Atmel, Corp.
ATMEL Corporation
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| Part No. |
ATF16V8C-7JU ATF16V8C-7PU ATF16V8C-10JI G16V8AS G16V8CPMS G16V8CPAS G16V8CPMA G16V8MA G16V8MS GAL16V8A P16V8PDC P16V8PDR P16V8PDS
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| OCR Text |
... to indeterminate levels. this helps to further reduce system power. selection of the power-down opti on is specified in the atf16v8c logic design file. the logi c compiler will include this option selection in the otherwise standard 16v... |
| Description |
7NS, PLCC, IND TEMP, GREEN(EPLD) FLASH PLD, 7.5 ns, PQCC20
7NS, PDIP, IND TEMP, GREEN(EPLD) FLASH PLD, 7.5 ns, PDIP20
16V8 FAM,300 GATE SPLD,5V,STD PWR 20 PIN(EPLD) FLASH PLD, 10 ns, PQCC20
Industry-standard architecture Emulates Many 20-pin PALs Low-cost, easy to use software tools
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| File Size |
1,230.96K /
23 Page |
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