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    HDMP-1536 HDMP-1546

Agilent (Hewlett-Packard)
HP[Agilent(Hewlett-Packard)]
Part No. HDMP-1536 HDMP-1546
OCR Text ...-Bit Interface" Specification * Low Power Consumption, 630 mW * Transmitter and Receiver Functions Incorporated onto a Single IC * Auto Freq...Latency Units nsec nsec nsec bits Min. 2 1.5 Typ. Max. 7.5 8.0 Notes: 1. Device te...
Description Fibre Channel Transceiver Chip

File Size 246.58K  /  15 Page

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    HDMP-1636 HDMP-1646

Dantona Industries, Inc.
HP[Agilent(Hewlett-Packard)]
Agilent (Hewlett-Packard)
Part No. HDMP-1636 HDMP-1646
OCR Text ... X3T11 "10 Bit Specification" * Low Power Consumption * Transmitter and Receiver Functions Incorporated onto a Single IC * Two Package Sizes...Latency Units nsec nsec nsec bits Min. 2 1 Typ. Max. TBD TBD Note: 1. The transmit...
Description Gigabit Ethernet Transceiver Chip 千兆以太网收发器芯片
Software

File Size 314.09K  /  15 Page

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    International Business Machines, Corp.
Part No. IBM13M32734BCB
OCR Text ... deactivates the ck signal when low. by deactivat- ing the clocks, cke low initiates the power down mode, suspend mode, or the self refresh ...latency of three clock cycles in registered mode, and controls the output buffers like an output ena...
Description 32M x 72 2-Bank Registered SDRAM Module(32M x 72 2组寄存同步动态RAM模块) 32M × 72配置2,银行注册内存模块(32M × 72配置2组寄存同步动态内存模块)

File Size 196.87K  /  20 Page

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    International Business Machines, Corp.
Part No. IBM13M32734BCA
OCR Text ... deactivates the ck signal when low. by deactivat- ing the clocks, cke low initiates the power down mode, suspend mode, or the self refresh ...latency of three clock cycles in registered mode, and controls the output buffers like an output ena...
Description 32M x 72 2-Bank Registered SDRAM Module(32M x 72 2组寄存同步动态RAM模块) 32M × 72配置2,银行注册内存模块(32M × 72配置2组寄存同步动态内存模块)

File Size 224.46K  /  20 Page

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    HYB39L128160AT

Infineon Technologies AG
Part No. HYB39L128160AT
OCR Text ...bile-ram is a new generation of low power, four bank synchronous dram organized as 4 banks 2mbit x16. these synchronous mobile-rams achieve...latency and speed grade of the device. auto refresh (cbr) and self refresh operation are supported. ...
Description 128-MBIT SYNCHRONOUS LOW-POWER DRAM

File Size 806.52K  /  49 Page

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    White Electronic Designs
Part No. W3DG64128V-D1
OCR Text ...v ih 2.0 3.0 v ccq+0.3 v1 input low voltage v il -0.3 0.8 v 2 output high voltage v oh 2.4 v i oh = -2ma output low voltage v ol 0.4 v ...latency = 2 or 3, lvttl levels, rated @ 50 pf all outputs switching 6.0 (tco = 5.2) 5.4 (tco = 4...
Description SDRAM UNBUFFERED

File Size 157.43K  /  7 Page

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    Integrated Silicon Solution, Inc.
Part No. IC42S16160
OCR Text ...onous drams are compatible with low voltage ttl (lvttl).these products are packaged in 54-pin tsop-2. 4m x 16 bits x 4 banks (256-mbit) sync...latency = 3 -6 ? 90 ma burst length=1 -7 ? 80 ma t rc = t rc (min.) t clk = t clk (min.) i cc 2p...
Description 4M x 16Bit x 4 Banks (256-MBIT) SDRAM 4米16 × 4银行56兆)内存

File Size 1,228.50K  /  69 Page

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    Hynix Semiconductor, Inc.
Part No. HY57V281620ALT-10
OCR Text ... 100mhz hy57v281620alt-6 166mhz low power hy57v281620alt-k 133mhz hy57v281620alt-h 133mhz hy57v281620alt-8 125mhz hy57v281620alt-p 100mhz hy...latency internal row counter dq0 dq1 dq14 dq15 refresh self refresh logic & timer pipe line control...
Description x16 SDRAM x16内存

File Size 111.89K  /  13 Page

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    IDT
Part No. IDT72V3680L15PF8 IDT72V3680L10PF IDT72V3680L6BB8 IDT72V3680L7-5BB8 IDT72V3680L7-5PF8 IDT72V3680L10PF8 IDT72V3680L15PFI IDT72V3680L15PFI8 IDT72V3680L6PF IDT72V3680L7-5BBI IDT72V3680L6PF8 IDT72V3640L15PF8 IDT72V3640L15PFI IDT72V3640L15PFI8 IDT72V3640L10PF IDT72V3640L10PF8 IDT72V3640L6BB IDT72V3640L6BB8 IDT72V3640L6PF IDT72V3640L6PF8 IDT72V3640L7-5BB IDT72V3640L7-5BB8 IDT72V3640L7-5BBI IDT72V3640L7-5PF IDT72V3640L7-5PF8 IDT72V3670L6BB IDT72V3670L6BB8 IDT72V3670L6PF8
OCR Text ...input tolerant ? ? ? ? ? fixed, low first word latency ? ? ? ? ? zero latency retransmit ? ? ? ? ? auto power down minimizes standby power consumption ? ? ? ? ? master reset clears entire fifo ? ? ? ? ? partial reset clears data, but retain...
Description 16K x 36 SuperSync II FIFO, 3.3V
1K x 36 SuperSync II FIFO, 3.3V
8K x 36 SuperSync II FIFO, 3.3V

File Size 465.20K  /  46 Page

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    ICS9248-110 ICS9248YF-110 ICS9248YF-110LF

Integrated Circuit Syst...
ICST[Integrated Circuit Systems]
Integrated Device Technology, Inc.
Part No. ICS9248-110 ICS9248YF-110 ICS9248YF-110LF
OCR Text ...s 24 or 48MHz output for pin 24 Low = 48MHz High = 24MHz Fixed clock out selectable through SEL24-48# Ground for 48MHz outputs Clock input f...latency is less than 4 CPUCLKs and CPUCLK off latency is less than 4 CPUCLKs. INTERNAL CPUCLK PCI...
Description K7; 750/760; System Clock Chip: 90 - 150MHz CPU
AMD-K7TM System Clock Chip
Frequency Generator & Integrated Buffers
115 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 0.300 INCH, SSOP-48

File Size 150.77K  /  14 Page

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