 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| CXD3204R IEEE1394 LSI for D-STB, D-VHS, and DTV Description The CXD3204R is an LSI integrating Link Layer and Physical Layer conforming to the IEEE1394-1995 serial bus standard on a single chip. Link Layer provides MPEG2 transpor t stream dedicated input interface and output interface, IEC958 audio stream I/O interface and output interface for D/A c o nve r t e r a s a d a t a i n t e r fa c e fo i s o c h r o n o u s communication. Also, a maximum 512 bytes of asynchronous communication is possible. Physical Layer provides two poarts for 1394 cable i n t e r fa c e , a n d s u p p o r t s t r a n s fe r s p e e d o f 200/100Mbit/s. Also, this layer provides received packet data regeneration repeat function, arbitration function and bus initialization logic. T h i s L S I u t i l i ze s A p p l e C o m p u t e r 's F i r e W i r e technology. 176-pin LQFP (Plastic) Feature Summary I Conforms to IEEE1394-1995 serial bus standard I Supports 100Mbps/200Mbps I Link layer x Supports DVB transport streams x Supports IEC958 audio stream x Built-in PID filter function x 2-channel isochronous simultaneous transmission/synchronous transmission and reception x Supports DMA (2-channel) transfer using host bus x Isochronous data inserted from asynchronous data port x Built-in cipher circuit conforming to DTCP format x Large capacity FIFO Isochronous Transmit/Receive FIFO: 960 x 32-bit x 2 Asynchronous Transmit FIFO: 132 x 33-bit Asynchronous Receive FIFO: 133 x 33-bit x CIP header automatic attachment/detection I Physical layer x Live wire detection function when port is connected to operation node x Automatic shutdown function against stopport for powersaving x Bus initialization and arbitration state machine logic x Re-synchronization for reception data for local clock x Link-On packet recognition x DS link encode/decode x 196.603MHz PLL M IN I I I I I Application I Digital interface for D-STB, D-VHS and DTV Absolute Max. Ratings (TA = 25oC, VSS = 0V) Supply voltage Input voltage Output voltage Operating temperature Storage temperature VDD VI VO TOPR TSTG VSS-0.5 ~ +4.6 VSS-0.5 ~ VDD+0.5 VSS-0.5 ~ VDD+0.5 -20 ~ +75 -55 ~ +150 V V V oC oC EL I Recommended Operating Conditions VDD 3.0 ~ 3.6 I Supply voltage I Operating temperature TOPR -20 ~ +75 V oC PR Revision 0.0 (5/22/99) A x Cable power reduction is detected with cable power status x Supports configuration manager cable and power class definition pin. x Independent 2-port TpBias R Y 1 Sony Semiconductor Business Division CXD3204R Copyright Information Copyright(c) 1999 Sony Electronics Inc. All rights reserved. This manual, the hardware, and software described herein, in whole or in part, may not be reproduced, translated, or reduced to any machine-readable form without prior written approval. Sony Electronics Inc. provides no warranty with regard to this document, the hardware, software, or other informatin contained herein and hereby expressly disclaims any implied warranties or merchantability or fitness for any particular purpose with regard to this document, the software, or such other information. In no event shall Sony Electronics Inc. be liable for any incidental, consequential, or special damages, whether based on tort, contract, or otherwise, arising out of or in connection with this manual, the software, or other information contained herein or the use thereof. The SONY logo and CXD3204R are registered trademarks of Sony Corp. Fire Wire is a registered trademark of Apple Computer, Inc. Sony Electronics Inc., Semiconductor Business Division 3300 Zanker Road San Jose, CA 95134 TEL: (1-800) 288-SONY email: ssaweb@mail.sel.sony.com http://www.sony.com/semi/ FAX: (1-408) 955-6022 2 PR Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. EL IM Revision 0.0 (5/22/99) IN A R Y |
Price & Availability of CXD3204R
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |