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| l MK1726-08 Spread Spectrum Clock Generator Features * * * * * * * * Packaged in 8-pin SOIC Available in Pb (lead) free package Input frequency range 16- 32 MHz Provides modulated and unmodulated clocks Accepts a clock or crystal input Provides down spread modulation Provides power down function Reduce electromagnetic interference (EMI) by 8-16 db Description The MK1726-08 generates a low EMI output clock and a reference clock from a clock or crystal input. The part is designed to lower EMI through the application of spreading a clock. Using ICS' proprietary mix of analog and digital Phase-Locked Loop (PLL) technology, the device spreads the frequency spectrum of the output, reducing the frequency amplitude peaks by several dB depending on spread range. The MK1726-08 offers a range of down spread from a high speed clock or crystal input. The MK1726-08 generates one modulated (SSCLK) and unmodulated (REFCLK) clock and is compatible with Cypress CY25819. The modulated clock is controlled by the select pin, and the unmodulated clock has the same frequency as the input clock or crystal. * Operating voltage of 3.3 V * Advanced, low-power CMOS process Block Diagram VDD PD S0 PLL Clock Synthesis and Spread Spectrum Circuitry REFCLK X1/CLK Clock Buffer/ Crystal Ocsillator X2 External caps required for with crystal for accurate tuning of the clock SSCLK GND MDS 1726-08 B Integrated Circuit Systems, Inc. 1 525 Race Street, San Jose, CA 95126 Revision 072204 tel (408) 297-1201 www.icst.com l MK1726-08 Spread Spectrum Clock Generator Pin Assignment X1/ICLK GND S0 SSCLK 1 2 3 4 8 7 6 5 X2 VDD PD REFCLK Spread Percentage Select Table S0 0 1 M Spread Direction Down Down Down Spread Percentage (%) -1.8 -2.5 -0.6 8 p i n ( 1 5 0 mi l ) S O I C 0 = connect to GND M= unconnected 1 = connect directly to VDD * Default has internal pull up resitor to VDD Pin Descriptions Pin Number Pin Name Pin Type Pin Description 1 2 3 4 5 6 7 8 X1/ICLK GND S0 SSCLK REFCLK PD VDD X2 Input Power Input Output Power Input Power Input Connect to 16-32 MHz crystal or clock. Connect to ground. Select spread percentage per table above. Internal pull-up. Spread spectrum clock output per table above. CMOS level clock output matches the nominal frequency of the input crystal or clock. Power down tri-state. This pin powers down entire chip and tri-state the outputs when low. Internal pull-up. Connect to 3.3 V. Connect to 16-32 MHz crystal or leave unconnected. MDS 1726-08 B Integrated Circuit Systems, Inc. 2 525 Race Street, San Jose, CA 95126 Revision 072204 tel (408) 297-1201 www.icst.com l MK1726-08 Spread Spectrum Clock Generator External Components The MK1726-08 requires a minimum number of external components for proper operation. away from the MK1726-08. This includes signal traces just underneath the device, or on layers adjacent to the ground plane layer used by the device. Decoupling Capacitor A decoupling capacitor of 0.01F must be connected between VDD and GND, as close to these pins as possible. For optimum device performance, the decoupling capacitor should be mounted on the component side of the PCB. Avoid the use of vias in the decoupling circuit. Crystal Information The crystal used should be a fundamental mode (do not use third overtone), parallel resonant. Crystal capacitors should be connected from pins X1 to ground and X2 to ground to optimize the initial accuracy. The value of these capacitors is given by the following equation: Crystal caps (pF) = (CL - 6) x 2 In the equation, CL is the crystal load capacitance. So, for a crystal with a 16 pF load capacitance, two 20 pF [(16-6) x 2] capacitors should be used. Series Termination Resistor When the PCB trace between the clock output and the load is over 1 inch, series termination should be used. To series terminate a 50 trace (a commonly used trace impedance) place a 33 resistor in series with the clock line, as close to the clock output pin as possible. The nominal impedance of the clock output is 20. Spread Spectrum Profile The MK1726-08 low EMI clock generator uses an optimized frequency slew rate algorithm to facilitate down stream tracking of zero delay buffers and other PLL devices. The frequency modulation amplitude is constant with variations of the input frequency. PCB Layout Recommendations For optimum device performance and lowest output phase noise, the following guidelines should be observed. 1) The 0.01F decoupling capacitor should be mounted on the component side of the board as close to the VDD pin as possible. No vias should be used between the decoupling capacitor and VDD pin. The PCB trace to VDD pin should be kept as short as possible, as should the PCB trace to the ground via. 2) To minimize EMI, the 33 series termination resistor (if needed) should be placed close to the clock output. 3) An optimum layout is one with all components on the same side of the board, minimizing vias through other signal layers. Other signal traces should be routed Modulation R ate Frequency Time MDS 1726-08 B Integrated Circuit Systems, Inc. 3 525 Race Street, San Jose, CA 95126 Revision 072204 tel (408) 297-1201 www.icst.com l MK1726-08 Spread Spectrum Clock Generator Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the MK1726-08. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. Item Supply Voltage, VDD All Inputs and Outputs Ambient Operating Temperature Storage Temperature Junction Temperature Soldering Temperature 7V Rating -0.5 V to VDD+0.5 V 0 to +70C -65 to +150C 125C 260C Recommended Operation Conditions Parameter Ambient Operating Temperature Power Supply Voltage (measured in respect to GND) Min. 0 +2.97 Typ. Max. +70 3.63 Units C V DC Electrical Characteristics Unless stated otherwise, VDD = 3.3 V +10%, Ambient Temperature 0 to +70C Parameter Power Supply Range Input High Voltage Input Middle Voltage Input Low Voltage Output High Voltage Output High Voltage Output Low Voltage Output Low Voltage Power Supply Current Power Supply Current Symbol VDD VINH VINM VINL VOH1 VOH2 VOL1 VOL2 IDD2 IDD3 Conditions S0 Input S0 Input S0 Input IOH =4 ma, SSCLK and REFCLK IOH =6 ma, SSCLK and REFCLK IOL =4 ma, SSCLK IOL =10 ma, SSCLK FIN =32 MHz, no load PD = GND Min. 2.97 0.85 VDD 0.40 VDD 0.0 2.4 2.0 Typ. 3.3 VDD 0.50 VDD 0.0 Max. 3.63 VDD 0.60 VDD 0.15 VDD Units V V V V V V 0.4 1.2 19.0 150 23.0 250 V V mA uA MDS 1726-08 B Integrated Circuit Systems, Inc. 4 525 Race Street, San Jose, CA 95126 Revision 072204 tel (408) 297-1201 www.icst.com l MK1726-08 Spread Spectrum Clock Generator Parameter Input Capacitance clock output impedance Internal pull-up resistor Symbol CIN Conditions Min. Typ. 5 20 Max. Units pF ohms k RPU SEL 360 AC Electrical Characteristics Unless stated otherwise, VDD = 3.3 V +10%, Ambient Temperature 0 to +70 C Parameter Input Clock Frequency Output Clock Frequency Clock Rise Time Clock Fall Time Input Clock Duty Cycle Output Clock Duty Cycle Cycle-to-Cycle Jitter Symbol Conditions Min. 16 16 Typ. Max. Units 32 32 MHz MHz ns ns % % ps trise1 tfall1 SSCLK and REFCLK, 0.4 V to 2.4 V SSCLK and REFCLK, 0.4 V to 2.4 V X1 SSCLK and REFCLK @1.5V SSCLK, Fin=21MHz, Fout=21MHz REFCLK, Fin=21MHz, Fout=21MHz 2.0 2.0 20 45 3.0 3.0 50 50 250 4.0 4.0 80 55 350 Cycle-to-Cycle Jitter 275 375 ps EMI Peak Frequency Reduction 8 to 16 dB MDS 1726-08 B Integrated Circuit Systems, Inc. 5 525 Race Street, San Jose, CA 95126 Revision 072204 tel (408) 297-1201 www.icst.com l MK1726-08 Spread Spectrum Clock Generator Thermal Characteristics Parameter Thermal Resistance Junction to Ambient Symbol JA JA JA JC Conditions Still air 1 m/s air flow 3 m/s air flow Min. Typ. 110 100 80 35 Max. Units C/W C/W C/W C/W Thermal Resistance Junction to Case Marking Diagram 8 5 MK172608 ###### YYWW 1 Notes: 1. ###### is the lot code. 2. YYWW is the last two digits of the year, and the week number that the part was assembled. 4 Marking Diagram (Pb free) 8 5 MK17268L ###### YYWW 1 Notes: 1. ###### is the lot code. 2. YYWW is the last two digits of the year, and the week number that the part was assembled. 3. "L" designates Pb (lead) free package. 4 MDS 1726-08 B Integrated Circuit Systems, Inc. 6 525 Race Street, San Jose, CA 95126 Revision 072204 tel (408) 297-1201 www.icst.com l MK1726-08 Spread Spectrum Clock Generator Package Outline and Package Dimensions (8 pin SOIC, 150 Mil. Narrow Body) Package dimensions are kept current with JEDEC Publication No. 95 Symbol Millimeters Min Max Inches Min Max Index Area EH Pin 1 D h x 45 0 A A1 B C D E e H h L a 1.35 1.75 1.10 0.25 0.33 0.51 0.19 0.25 4.80 5.00 3.80 4.00 1.27 Basic 5.80 6.20 0.25 0.50 0.40 1.27 0 8 0.0532 0.0688 0.0040 0.0098 0.013 0.020 0.0075 0.0098 .1890 .1968 0.1497 0.1574 0.050 Basic 0.2284 0.2440 0.010 0.020 0.016 0.050 0 8 A Q e b c Ordering Information Part / Order Number MK1726-08S MK1726-08STR MK1726-08SLF MK1726-08SLFTR Marking see previous page see previous page see previous page see previous page Shipping Packaging Tubes Tape and Reel Tubes Tape and Reel Package 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC Temperature 0 to +70 C 0 to +70 C 0 to +70 C 0 to +70 C "LF" designates Pb (lead) free package. While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. MDS 1726-08 B Integrated Circuit Systems, Inc. 7 525 Race Street, San Jose, CA 95126 Revision 072204 tel (408) 297-1201 www.icst.com |
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