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| 74LVX08 Low Voltage Quad 2-Input AND Gate May 1993 Revised February 2005 74LVX08 Low Voltage Quad 2-Input AND Gate General Description The LVX08 contains four 2-input AND gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. Features s Input voltage level translation from 5V to 3V s Ideal for low power/low noise 3.3V applications s Guaranteed simultaneous switching noise level and dynamic threshold performance Ordering Code: Order Number 74LVX08M 74LVX08SJ 74LVX08MTC 74LVX08MTCX_NL (Note 1) Package Number M14A M14D MTC14 MTC14 Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending suffix letter "X" to the ordering code. Pb-Free package per JEDEC J-STD-020B. Note 1: "_NL" indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only. Logic Symbol IEEE/IEC Connection Diagram Pin Descriptions Pin Names An , Bn On Description Inputs Outputs (c) 2005 Fairchild Semiconductor Corporation DS011602 www.fairchildsemi.com 74LVX08 Absolute Maximum Ratings(Note 2) Supply Voltage (VCC) DC Input Diode Current (IIK) VI 0.5V to 7.0V 20 mA 0.5V to 7V 20 mA 20 mA 0.5V to VCC 0.5V r25 mA r50 mA 65qC to 150qC 180 mW 240qC Recommended Operating Conditions (Note 3) Supply Voltage (VCC) Input Voltage (VI) Output Voltage (VO) Operating Temperature (TA) Input Rise and Fall Time ('t/'V) 2.0V to 3.6V 0V to 5.5V 0V to VCC 0.5V DC Input Voltage (VI) DC Output Diode Current (IOK) VO VO 40qC to 85qC 0 ns/V to 100 ns/V 0.5V VCC 0.5V DC Output Voltage (VO) DC Output Source or Sink Current (IO) DC VCC or Ground Current (ICC or IGND) Storage Temperature (TSTG) Power Dissipation Lead Temperature (TL) (Soldering, 10 seconds) Note 2: The "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The "Recommended Operating Conditions" table will define the conditions for actual device operation. Note 3: Unused inputs must be held HIGH or LOW. They may not float. DC Electrical Characteristics Symbol VIH Parameter HIGH Level Input Voltage VCC 2.0 3.0 3.6 VIL LOW Level Input Voltage 2.0 3.0 3.6 VOH HIGH Level Output Voltage 2.0 3.0 3.0 VOL LOW Level Output Voltage 2.0 3.0 3.0 IIN ICC Input Leakage Current Quiescent Supply Current 3.6 3.6 1.9 2.9 2.58 0.0 0.0 0.1 0.1 0.36 2.0 3.0 TA Min 1 2.0 2.4 0.5 0.8 0.8 1.9 2.9 2.48 0.1 0.1 0.44 V VIN V 25qC Typ Max TA 40qC to 85qC Min 1.5 2.0 2.4 0.5 0.8 0.8 Max Units Conditions V V VIN VIL or VIH IOH IOH IOH V IL or VIH IOL IOL IOL VIN VIN 5.5V or GND VCC or GND 50 PA 50 PA 4 mA 50 PA 50 PA 4 mA r0.1 2.0 r1.0 20.0 PA PA Noise Characteristics (Note 4) Symbol VOLP VOLV VIHD VILD Parameter Quiet Output Maximum Dynamic VOL Quiet Output Minimum Dynamic VOL Minimum HIGH Level Dynamic Input Voltage Maximum LOW Level Dynamic Input Voltage tf 3 ns VCC (V) 3.3 3.3 3.3 3.3 TA Typ 0.3 25qC Limit 0.5 Units V V V V CL (pF) 50 50 50 50 0.3 0.5 2.0 0.8 Note 4: Input tr www.fairchildsemi.com 2 74LVX08 AC Electrical Characteristics Symbol tPLH tPHL 3.3 r 0.3 tOSLH tOSHL Output to Output Skew (Note 5) 2.7 3.3 |t PLHm tPLHn|, tOSHL Parameter Propagation Delay Time VCC (V) 2.7 Min TA 25qC Typ 6.3 8.8 4.8 7.3 Max 11.4 14.9 7.1 10.6 1.5 1.5 TA 40qC to 85qC Min 1.0 1.0 1.0 1.0 Max 13.5 17.0 8.5 12.0 1.5 1.5 Units CL (pF) 15 ns 50 15 50 50 ns Note 5: Parameter guaranteed by design. tOSLH |t PHLm tPHLn| Capacitance Symbol CIN CPD Input Capacitance Power Dissipation Capacitance (Note 6) Note 6: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Parameter Min TA 25qC Typ 4 18 Max 10 TA 40qC to 85qC Min Max 10 Units pF pF 3 www.fairchildsemi.com 74LVX08 Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M14A www.fairchildsemi.com 4 74LVX08 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M14D 5 www.fairchildsemi.com 74LVX08 Low Voltage Quad 2-Input AND Gate Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC14 Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 6 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com |
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