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| R Austria Mikro Systeme International DL82 CUB 0.6 m CMOS DL82 is a transparent D-latch with 2x drive strength. The Q output follows the D input when GN is low. The Q output is independent of D when GN is high and retains the value of D just prior to the rising edge on GN. Truth Table D L H X GN L L H Q L H QN H L Capacitance Ci (pF) D DL82 Q D GN 0.013 0.023 no change GN QN Area 0.95 mils2 Power 4.61 W / MHz Delay [ns] = tpd.. = f(SL, L) Output Slope [ns] = op_sl.. = f(L) AC Characteristics : Tj = 25C with SL = Input Slope [ns] ; L = Output Load [pF] with L = Output Load [pF] Typical Process VDD = 3.3V AC Characteristics SL = 0.1 SL = 2.0 L = 2.0 L = 0.2 L = 1.4 L = 2.0 Characteristics Symbol tpddqr tpddqf tpddqnr tpddqnf tpdgnqr tpdgnqf tpdgnqnr tpdgnqnf op_sldqr op_sldqf op_sldqnr op_sldqnf op_slgnqr op_slgnqf op_slgnqnr op_slgnqnf L = 0.2 L = 1.4 Delay D to Q Delay D to QN Delay GN to Q Delay GN to QN Output Slope D to Q Output Slope D to QN Output Slope GN to Q Output Slope GN to QN 1.02 1.27 1.72 1.47 1.25 1.57 2.04 1.71 1.07 1.01 1.01 0.78 1.03 0.98 1.00 0.76 2.48 2.59 3.10 2.62 2.71 2.89 3.43 2.86 5.30 4.05 5.13 3.78 5.13 4.01 5.15 3.81 3.19 3.16 3.75 3.17 3.41 3.46 4.13 3.45 7.32 5.30 7.25 5.45 7.50 5.32 7.25 5.42 1.11 1.45 1.89 1.57 1.55 1.86 2.34 2.02 1.08 1.00 0.96 0.78 1.05 1.00 1.00 0.75 2.57 2.76 3.27 2.71 3.01 3.19 3.72 3.17 5.27 4.02 5.18 3.77 5.28 3.98 5.11 3.80 3.26 3.33 3.91 3.26 3.71 3.76 4.44 3.73 7.28 5.32 7.20 5.41 7.33 5.73 7.38 5.50 Sept. 1996 - 140 - Rev. N/C R Austria Mikro Systeme International DL82 CUB 0.6 m CMOS Characteristics Min D Setup Time to GN Min GN Width High Low Low Symbol tsudgnh tsudgnl twgn [ns] 0.74 0.92 0.96 Characteristics Min D Hold Time to GN High Low Symbol thdgnh thdgnl [ns] 0.00 0.00 Sept. 1996 - 141 - Rev. N/C |
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