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| MM74C164 8-Bit Parallel-Out Serial Shift Register October 1987 Revised January 2004 MM74C164 8-Bit Parallel-Out Serial Shift Register General Description The MM74C164 shift registers are a monolithic complementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement transistors. These 8-bit shift registers have gated serial inputs and clear. Each register bit is a D-type master/slave flip-flop. A high-level input enables the other input which will then determine the state of the flip-flop. Data is serially shifted in and out of the 8-bit register during the positive going transition of clock pulse. Clear is independent of the clock and accomplished by a low level at the clear input. All inputs are protected against electrostatic effects. Features s Supply voltage range: 3V to 15V drive 2 LPTTL loads s Tenth power TTL compatible: s Low power: 50 nW (typ.) s High noise immunity: 0.45 VCC (typ.) s Medium speed operation: 0.8 MHz (typ.) with 10V supply Applications * Data terminals * Instrumentation * Medical electronics * Alarm systems * Industrial electronics * Remote metering * Computers Ordering Code: Order Number MM74C164M MM74C164N Package Number M14A N14A Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Connection Diagram Truth Table Serial Inputs A and B Inputs tn A 1 0 1 0 B 1 1 0 0 Output tn+1 QA 1 0 0 0 Top View (c) 2004 Fairchild Semiconductor Corporation DS005896 www.fairchildsemi.com MM74C164 Block Diagram www.fairchildsemi.com 2 MM74C164 Absolute Maximum Ratings(Note 1) Voltage at Any Pin Operating Temperature Range Storage Temperature Range Absolute Maximum VCC Power Dissipation (PD) Dual-In-Line Small Outline Operating VCC Range Lead Temperature (soldering, 10 seconds) 260C 700 mW 500 mW 3V to 15V Note 1: "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. Except for "Operating Temperature Range" they are not meant to imply that the devices should be operated at these limits. The table of "Electrical Characteristics" provides conditions for actual device operation. -0.3V to VCC + 0.3V -55C to +125C -65C to +150C 18V DC Electrical Characteristics Min/Max limits apply across temperature range unless otherwise noted Symbol Parameter Conditions CMOS TO CMOS VIN(1) VIN(0) VOUT(1) VOUT(0) IIN(1) IIN(0) ICC VIN(1) VIN(0) VOUT(1) VOUT(0) ISOURCE ISOURCE ISINK ISINK Logical "1" Input Voltage Logical "0" Input Voltage Logical "1" Output Voltage Logical "0" Output Voltage Logical "1" Input Current Logical "0" Input Current Supply Current Logical "1" Input Voltage Logical "0" Input Voltage Logical "1" Output Voltage Logical "0" Output Voltage Output Source Current Output Source Current Output Sink Current Output Sink Current VCC = 5V VCC = 10V VCC = 5V VCC = 10V VCC = 5V, IO = -10 A VCC = 10V, IO = -10 A VCC = 5V, IO = +10 A VCC = 10V, IO = +10 A VCC = 15V, VIN = 15V VCC = 15V, VIN = 0V VCC = 15V VCC = 4.75V VCC = 4.75V VCC = 4.75V, IO = -360 A VCC = 4.75V, IO = 360 A VCC = 5V, VIN(0) = 0V TA = 25C, VOUT = 0V VCC = 10V, VIN(0) = 0V TA = 25C, VOUT = 0V VCC = 5V, VIN(1) = 5V TA = 25C, VOUT = V CC VCC = 10V, VIN(1) = 10V TA = 25C, VOUT = V CC 2.4 0.4 VCC - 1.5 0.8 -1.0 0.005 -0.005 0.05 300 4.5 9.0 0.5 1.0 1.0 3.5 8.0 1.5 2.0 V V V V A A A V V V V Min Typ Max Units CMOS TO LPTTL INTERFACE OUTPUT DRIVE (See Family Characteristics Data Sheet) (Short Circuit Current) -1.75 -8.0 1.75 8.0 mA mA mA mA 3 www.fairchildsemi.com MM74C164 AC Electrical Characteristics TA = 25C, CL = 50 pF, unless otherwise noted Symbol tpd1 tpd0 tS tH fMAX tW tr, tf CIN CPD Parameter Propagation Delay Time to a Logical "0" or a Logical "1" from Clock to Q Clear to Q Time Prior to Clock Pulse that Data Must be Present Time After Clock Pulse that Data Must be Held Maximum Clock Frequency Minimum Clear Pulse Width Maximum Clock Rise and Fall Time Input Capacitance Power Dissipation Capacitance (Note 2) Conditions VCC = 5V VCC = 10V VCC = 10V VCC = 5V VCC = 10V VCC = 5V VCC = 10V VCC = 5V VCC = 10V VCC = 5V VCC = 10V VCC = 5V VCC = 10V Any Input (Note 3) (Note 4) 15 5 5 140 200 80 0 0 2.0 5.5 Min Typ 230 90 280 110 110 30 0 0 3 8 150 55 250 90 Max 310 120 380 150 Units ns ns ns ns MHz ns s pF pF Propagation Delay Time to a Logical "0" from VCC = 5V Note 2: AC Parameters are guaranteed by DC correlated testing. Note 3: Capacitance is guaranteed by periodic testing. Note 4: CPD determines the no load AC power consumption of any CMOS device. For complete explanation see Family Characteristics application note AN-90. Typical Applications 74C Compatibility Guaranteed Noise Margin as a Function of VCC www.fairchildsemi.com 4 MM74C164 Logic Waveform AC Test Circuit Switching Time Waveforms CMOS to CMOS TTL to CMOS tr = tf = 20 ns 5 www.fairchildsemi.com MM74C164 Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M14A www.fairchildsemi.com 6 MM74C164 8-Bit Parallel-Out Serial Shift Register Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N14A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 7 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com www.fairchildsemi.com |
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