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| SSG9685 5.3A, 80V,RDS(ON) 45m[ Elektronische Bauelemente N-Channel Enhancement Mode Power Mos.FET SOP-8 Description The SSG9685 provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The SOP-8 is universally preferred for all commercial industrial surface mount application and suited for low voltage applications such as DC/DC converters. 0.35 0.49 1.27Typ. 4.80 5.00 0.100.25 6.20 5.80 0.25 0.40 0.90 0.19 0.25 45 o 0.375 REF 3.80 4.00 Features * Fast Switching Characteristic * Simple Drive Requirement * Low Gate Charge * RoHS Compliant Date Code D1 8 D1 7 D2 6 D2 5 0 o 8 o 1.35 1.75 Dimensions in millimeters D 9685SC G 1 S1 2 G1 3 S2 4 G2 S Absolute Maximum Ratings Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Continuous Drain Current Pulsed Drain Current 1 3 3 Symbol VDS VGS ID@TA=25 C ID@TA=70 C IDM PD@TA=25 C o o o Ratings 80 20 5.3 3.4 50 2.5 0.02 Unit V V A A A W W/ C o o Total Power Dissipation Linear Derating Factor Operating Junction and Storage Temperature Range Tj, Tstg -55~+150 C Thermal Data Parameter Thermal Resistance Junction-ambient 3 Symbol Max. Rthj-a Ratings 50 o Unit C /W http://www.SeCoSGmbH.com/ Any changing of specification will not be informed individual 01-Jun-2002 Rev. A Page 1 of 4 SSG9685 5.3A, 80V,RDS(ON) 45m[ Elektronische Bauelemente N-Channel Enhancement Mode Power Mos.FET Electrical Characteristics( Tj=25 oC Unless otherwise specified) Parameter Drain-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Gate Threshold Voltage Gate-Source Leakage Current Drain-Source Leakage Current (Tj=25oC) Drain-Source Leakage Current (Tj=70oC) Static Drain-Source On-Resistance2 Symbol BVDSS BVDS/ Tj VGS(th) IGSS IDSS Min. 80 _ Typ. _ Max. _ _ Unit V V/ oC V nA uA uA Test Condition VGS=0V, ID=250uA Reference to 25oC, ID=1mA VDS=VGS, ID=250uA VGS= 20V VDS=80V,VGS=0 VDS=64V,VGS=0 VGS=10V, ID=5.3A VGS=4.5V, ID=3A 0.073 _ _ _ _ 1.0 _ _ _ _ 3.0 100 1 25 45 50 30 _ _ _ _ 19 5 10 11 6 36 22 1710 135 98 9 RDS(ON) Qg Qgs Qgd Td(ON) Tr Td(Off) Tf Ciss Coss Crss Gfs _ _ _ _ _ _ _ _ _ _ _ m[ Total Gate Charge 2 Gate-Source Charge Gate-Drain ("Miller") Charge Turn-on Delay Time2 Rise Time Turn-off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Forward Transconductance nC ID=5A VDS=64V VGS=4.5V _ _ _ _ VDD=40V ID=1A nS VGS=10V RG=3.3 [ RD=40 [ 2730 _ _ pF VGS=0V VDS=25V f=1.0MHz _ _ S VDS=10V, ID=5A Source-Drain Diode Parameter Forward On Voltage 2 Symbol VDS Min. _ Typ. _ Max. 1.2 Unit V Test Condition IS =2A,VGS=0V. IS =5A , VGS=0V. dl/dt=100A/us Reverse Recovery Time 2 Trr Qrr _ _ 42 84 _ _ nS nC Reverse Recovery Charge Notes: 1.Pulse width limited by safe operating area. 2.Pulse widthO 300us, dutycycleO2%. O 3.Surface mounted on 1 inch2 copper pad of FR4 board; 125 C/W when mounted on min. copper pad. http://www.SeCoSGmbH.com/ Any changing of specification will not be informed individual 01-Jun-2002 Rev. A Page 2 of 4 SSG9685 5.3A, 80V,RDS(ON) 45m[ Elektronische Bauelemente N-Channel Enhancement Mode Power Mos.FET Characteristics Curve Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics Fig 3. On-Resistance v.s. Gate Voltage Fig 4. Normalized On-Resistance v.s. Junction Temperature Fig 5. Forward Characteristics of Reverse Diode http://www.SeCoSGmbH.com/ Fig 6. Gate Threshold Voltage v.s. Junction Temperature Any changing of specification will not be informed individual 01-Jun-2002 Rev. A Page 3 of 4 SSG9685 5.3A, 80V,RDS(ON) 45m[ Elektronische Bauelemente N-Channel Enhancement Mode Power Mos.FET Fig 7. Gate Charge Characteristics Fig 8. Typical Capacitance Characteristics Fig 9. Maximum Safe Operating Area Fig 10. Effective Transient Thermal Impedance Fig 11. Switching Time Waveform Fig 12. Gate Charge Waveform http://www.SeCoSGmbH.com/ Any changing of specification will not be informed individual 01-Jun-2002 Rev. A Page 4 of 4 |
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