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3 A, 1.2 MHz/600 kHz High Efficiency Synchronous Step-Down DC-to-DC Converter
ADP2118
FEATURES
3 A continuous output current 75 m and 40 m integrated FET 1.5% output accuracy Input voltage range from 2.3 V to 5.5 V Output voltage from 0.6 V to VIN 600 kHz or 1.2 MHz fixed switching frequency Synchronizable between 600 kHz and 1.4 MHz Selectable synchronize phase shift: 0o or 180o Selectable PWM or PFM mode operation Current mode architecture Precision enable input Power good output Voltage tracking input Integrated soft start Internal compensation Starts up into a precharged output UVLO, OVP, OCP, and thermal shutdown Available in 16-lead 4mm x 4mm LFCSP_WQ package
GENERAL DESCRIPTION
The ADP2118 is a low quiescent current, synchronous, step-down, dc-to-dc converter in a compact 4mm x 4mm LFCSP_WQ package. It uses a current mode, constant frequency pulse-width modulation (PWM) control scheme for excellent stability and transient response. Under light loads, the ADP2118 can be configured to operate in pulse frequency modulation (PFM) mode that reduces switching frequency to save power. The ADP2118 runs from input voltages of 2.3 V to 5.5 V. The output voltage of the ADP2118ACPZ-R7 is adjustable from 0.6 V to input voltage (VIN), and the ADP2118ACPZ-x.x-R7 are available in preset output voltage options of 3.3 V, 2.5 V, 1.8 V, 1.5 V, 1.2 V, and 1.0 V. The ADP2118 requires minimal external parts and provides a high efficiency solution with its integrated power switch, synchronous rectifier, and internal compensation. The IC draws less than 3 A from the input source when it is disabled. Other key features include undervoltage lockout (UVLO), integrated soft start to limit inrush current at startup, overvoltage protection (OVP), overcurrent protection (OCP), and thermal shutdown (TSD).
APPLICATIONS
DSP/FPGA/ASIC core power Telecommunication/networking equipment PDAs and palmtop computers Audio/video consumer electronics
C1 0.1F R1 10 R2 10k
16 15 14 13
PGOOD
VIN
PVIN
EN
CIN 100F X5R, 6.3V
VIN 5V
100 90 80 70 PFM OPERATION
EFFICIENCY (%)
1 2 3 4
SYNC/MODE FREQ TRK FB
PVIN 12 SW 11 SW 10 SW 9
L 1H COUT 100F X5R, 6.3V
ADP2118
VOUT 3.3V 3A
60 50 40 30 20 10 VIN = 5V VOUT = 3.3V fS = 1.2MHz 0.1 1 10
08301-050
FPWM OPERATION
PGND
PGND
7
5
6
08301-001
RBOT 2.21k
RTOP 10k
PGND
8
GND
0 0.01
OUTPUT CURRENT (A)
Figure 1. Typical Applications Circuit
Figure 2. Efficiency vs. Output Current
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c)2009 Analog Devices, Inc. All rights reserved.
ADP2118 TABLE OF CONTENTS
Features .............................................................................................. 1 Applications ....................................................................................... 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Absolute Maximum Ratings ............................................................ 5 Thermal Resistance ...................................................................... 5 ESD Caution .................................................................................. 5 Pin Configuration and Function Descriptions ............................. 6 Typical Performance Characteristics ............................................. 7 Functional Block Diagram ............................................................ 13 Theory of Operation ...................................................................... 14 Control Scheme .......................................................................... 14 PWM Mode Operation .............................................................. 14 PFM Mode Operation................................................................ 14 Slope Compensation .................................................................. 14 Enable/Shutdown ....................................................................... 14 Integrated Soft Start ................................................................... 14 Tracking ....................................................................................... 14 Oscillator and Synchronization ................................................ 15 Current Limit and Short-Circuit Protection .......................... 15 Overvoltage Protection (OVP) ................................................. 15 Undervoltage Lockout (UVLO) ............................................... 15 Thermal Shutdown .................................................................... 15 Power Good ................................................................................ 15 Applications Information .............................................................. 16 Output Voltage Selection ........................................................... 16 Inductor Selection ...................................................................... 16 Output Capacitor Selection....................................................... 16 Input Capacitor Selection .......................................................... 17 Voltage Tracking ......................................................................... 17 Typical Application Circuits ......................................................... 18 Outline Dimensions ....................................................................... 21 Ordering Guide .......................................................................... 21
REVISION HISTORY
7/09--Revision 0: Initial Version
Rev. 0 | Page 2 of 24
ADP2118 SPECIFICATIONS
VIN = PVIN = 3.3 V, EN = VIN, SYNC/MODE = high @ TJ = -40C to +125C, unless otherwise noted. Typical values are at TJ = 25oC. Table 1.
Parameter VIN AND PVIN VIN Voltage Range PVIN Voltage Range Quiescent Current Shutdown Current VIN Undervoltage Lockout Threshold OUTPUT CHARACTERISTICS Load Regulation1 Line Regulation1 FB FB Regulation Voltage FB Bias Current SW High-Side On Resistance2 Low-Side On Resistance2 SW Peak Current Limit SW Maximum Duty Cycle SW Minimum On Time3 TRK TRK Input Voltage Range TRK to FB Offset Voltage TRK Input Bias Current FREQUENCY Oscillator Frequency FREQ Input High Voltage FREQ Input Low Voltage SYNC/MODE Synchronization Range SYNC Minimum Pulse Width SYNC Minimum Off Time SYNC Input High Voltage SYNC Input Low Voltage INTEGRATED SOFT START Soft Start Time PGOOD Power Good Range Symbol VIN PVIN IVIN ISHDN UVLO Test Conditions/Comments Min 2.3 2.3 No switching, SYNC/MODE = GND Switching, no load, SYNC/MODE = high VIN = PVIN = 5.5 V, EN = GND VIN rising VIN falling Io = 0 A to 3 A Io = 1.5 A VFB IFB VIN = 2.3 V to 5.5 V 0.591 100 680 0.3 2.2 2.1 0.08 0.05 0.6 0.01 75 40 5.2 100 0 -10 600 +10 100 1.2 600 1.4 700 0.4 0.6 100 100 1.2 1.4 0.609 0.1 110 60 6.4 100 Typ Max 5.5 5.5 150 900 3 2.3 Unit V V A A A V V %/A %/V V A m m A % ns mV mV nA MHz kHz V V MHz ns ns V V Clock cycles 115 94 % % % % Clock cycles A mV
2
VIN = PVIN = 3.3 V, ISW = 500 mA VIN = PVIN = 3.3 V, ISW = 500 mA High-side switch, VIN = PVIN = 3.3 V VIN = PVIN = 5.5 V, full frequency VIN = PVIN = 5.5 V, full frequency
4
TRK = 0 mV to 500 mV
FREQ = VIN FREQ = GND
1.0 500 1.2
0.4 All switching frequency FB rising threshold FB rising hysteresis FB falling threshold FB falling hysteresis From FB to PGOOD VPGOOD = 5 V IPGOOD = 1 mA 105 85 2048 110 2.5 90 2.5 16 0.1 140
Power Good Deglitch Time PGOOD Leakage Current PGOOD Output Low Voltage
1 200
Rev. 0 | Page 3 of 24
ADP2118
Parameter EN EN Input Rising Threshold EN Input Hysteresis EN Pull-Down Resistor THERMAL Thermal Shutdown Threshold Thermal Shutdown Hysteresis
1 2
Symbol
Test Conditions/Comments VIN = 2.3 V to 5.5 V VIN = 2.3 V to 5.5 V
Min 1.12
Typ 1.2 100 1 140 15
Max 1.28
Unit V mV M C C
Specified by the circuit in Figure 45. Pin-to-pin measurements. 3 Guaranteed by design.
Rev. 0 | Page 4 of 24
ADP2118 ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter VIN, PVIN SW FB, SYNC/MODE, EN, TRK, FREQ, PGOOD PGND to GND Operating Junction Temperature Range Storage Temperature Range Soldering Conditions Rating -0.3 V to +6 V -0.3 V to +6 V -0.3 V to +6 V -0.3 V to +0.3 V -40C to +125C -65C to +150C JEDEC J-STD-020
THERMAL RESISTANCE
JA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. Table 3. Thermal Resistance
Package Type 16-Lead LFCSP_WQ JA 38.3 Unit C/W
Boundary Conditions
JA is measured using natural convection on a JEDEC 4-layer board, and the exposed pad is soldered to the printed circuit board with thermal vias.
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ESD CAUTION
Rev. 0 | Page 5 of 24
ADP2118 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
16 PGOOD 14 VIN 15 EN 13 PVIN
12 PVIN 11 SW 10 SW 9 SW
SYNC/MODE 1 FREQ 2 TRK 3 FB 4
ADP2118
TOP VIEW
NOTES 1. THE EXPOSED PAD SHOULD BE SOLDERED TO AN EXTERNAL GROUND PLANE UNDERNEATH THE IC FOR THERMAL DISSIPATION.
PGND 7
PGND 6
PGND 8
GND 5
Figure 3. Pin Configuration
Table 4. Pin Function Descriptions
Pin No. 1 Mnemonic SYNC/MODE Description Synchronization Input (SYNC). Connect this pin to an external clock between 600 kHz and 1.4 MHz to synchronize the switching frequency to the external clock (see the Oscillator and Synchronization section for details). CCM/PFM Selection (MODE). When this pin is connected to VIN, PFM mode is disabled and the ADP2118 only works in continuous conduction mode (CCM). When this pin is connected to ground, PFM mode is enabled and becomes active at light loads. Frequency Selection. Connect to GND to select 600 kHz and VIN for 1.2 MHz. Tracking Input. To track a master voltage, drive TRK from a voltage divider from the master voltage. If the tracking function is not used, connect TRK to VIN. Feedback Voltage Sense Input. Connect to a resistor divider from VOUT. For the fixed output version, connect to VOUT directly. Analog Ground. Connect to the ground plane. Power Ground. Connect to the ground plane and to the output return side of the output capacitor. Switch Node Output. Connect to the output inductor. Power Input Pin. Connect this pin to the input power source. Connect a bypass capacitor between this pin and PGND. Bias Voltage Input Pin. Connect a bypass capacitor between this pin and GND and a small (10 ) resistor between this pin and PVIN. Precision Enable Pin. The external resistor divider can be used to set the turn-on threshold. To enable the part automatically, connect the EN pin to VIN. This pin has a 1 M pull-down resistor to GND. Power-Good Output (Open Drain). Connect to a resistor to any pull-up voltage <5.5 V. The exposed pad should be soldered to an external ground plane underneath the IC for thermal dissipation.
2 3 4 5 6, 7, 8 9, 10, 11 12, 13 14 15 16 17 (EPAD)
FREQ TRK FB GND PGND SW PVIN VIN EN PGOOD Exposed Pad
Rev. 0 | Page 6 of 24
08301-002
ADP2118 TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25C, VIN = 5 V, VOUT = 1.2 V, L = 1 H, CIN = 100 F, COUT = 100 F, unless otherwise noted.
100 90 80 70 100 90 80 70
EFFICIENCY (%)
EFFICIENCY (%)
VOUT = 1.0V VOUT = 1.2V VOUT = 1.5V VOUT = 1.8V VOUT = 2.5V
08301-014
60 50 40 30 20 10 0 INDUCTOR COILCRAFT MSS1038-102NL
60 50 40 30 20 10 0 INDUCTOR COILCRAFT MSS1038-102NL VOUT = 1.0V VOUT = 1.2V VOUT = 1.5V VOUT = 1.8V VOUT = 2.5V
0
0.5
1.0
1.5
2.0
2.5
3.0
0
0.5
1.0
1.5
2.0
2.5
3.0
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
Figure 4. Efficiency (1.2 MHz, VIN = 3.3 V, FPWM) vs. Output Current
100 90 80 70
Figure 7. Efficiency (1.2 MHz, VIN = 3.3 V, PFM) vs. Output Current
100 90 80 70
EFFICIENCY (%)
60 50 40 30 20 10 0 0 0.5 1.0 1.5 2.0 2.5 3.0 OUTPUT CURRENT (A) INDUCTOR COILCRAFT MSS1038-102NL VOUT = 1.0V VOUT = 1.2V VOUT = 1.5V VOUT = 1.8V VOUT = 2.5V VOUT = 3.3V
08301-015
EFFICIENCY (%)
60 50 40 30 20 10 0 INDUCTOR COILCRAFT MSS1038-102NL VOUT = 1.0V VOUT = 1.2V VOUT = 1.5V VOUT = 1.8V VOUT = 2.5V VOUT = 3.3V
0
0.5
1.0
1.5
2.0
2.5
3.0
OUTPUT CURRENT (A)
Figure 5. Efficiency (1.2 MHz, VIN = 5 V, FPWM) vs. Output Current
100 90 80 70
Figure 8. Efficiency (1.2 MHz, VIN = 5 V, PFM) vs. Output Current
100 90 80 70
EFFICIENCY (%)
EFFICIENCY (%)
60 50 40 30 20 10 0 0 0.5 1.0 1.5 2.0 2.5 3.0 OUTPUT CURRENT (A) INDUCTOR SUMIDA CDRH105R2R2NC VOUT = 1.0V VOUT = 1.2V VOUT = 1.5V VOUT = 1.8V VOUT = 2.5V
08301-016
60 50 40 30 20 10 0 0 0.5 1.0 1.5 2.0 2.5 3.0 OUTPUT CURRENT (A) INDUCTOR SUMIDA CDRH105R2R2NC VOUT = 1.0V VOUT = 1.2V VOUT = 1.5V VOUT = 1.8V VOUT = 2.5V
08301-019
Figure 6. Efficiency (600 kHz, VIN = 3.3 V, FPWM) vs. Output Current
Figure 9. Efficiency (600 kHz, VIN = 3.3 V, PFM) vs. Output Current
Rev. 0 | Page 7 of 24
08301-018
08301-017
ADP2118
100 90 80 70
100 90 80 70
EFFICIENCY (%)
EFFICIENCY (%)
60 50 40 30 20 10 0
0 0.5 1.0 1.5 2.0
60 50 40 30
VOUT = 1.0V VOUT = 1.2V VOUT = 1.5V VOUT = 1.8V VOUT = 2.5V VOUT = 3.3V
1.5 2.0 2.5 3.0
08301-023
INDUCTOR SUMIDA CDRH105R2R2NC
VOUT = 1.0V VOUT = 1.2V VOUT = 1.5V VOUT = 1.8V VOUT = 2.5V VOUT = 3.3V
08301-020
20 10 0
0 0.5 1.0 3.0
INDUCTOR SUMIDA CDRH105R2R2NC
2.5
OUTPUT CURRENT(A)
OUTPUT CURRENT (A)
Figure 10. Efficiency (600 kHz, VIN = 5 V, FPWM) vs. Output Current
120 115
Figure 13. Efficiency (600 kHz, VIN = 5 V, PFM) vs. Output Current
606 605 604
QUIESCENT CURRENT (A)
FEEDBACK VOLTAGE (mV)
TJ = -40C TJ = +25C TJ = +125C
08301-021
110 105 100 95 90 85 80 2.3
603 602 601 600 599 598 597 596 595
2.7
3.1
3.5
3.9
4.3
4.7
5.1
5.5
-20
0
20
40
60
80
100
120
VIN (V)
TEMPERATURE (C)
Figure 11. Quiescent Current vs. VIN (No Switching)
130 120 110 100 90 80 70 60 50 40 2.3
TJ = -40C TJ = +25C TJ = +125C
08301-022
Figure 14. Feedback Voltage vs. Temperature (VIN = 3.3 V)
80 70 60 50 40 30 20 10 2.3 TJ = -40C TJ = +25C TJ = +125C
2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5
08301-025
2.7
3.1
3.5
3.9 VIN (V)
4.3
4.7
5.1
5.5
NFET RESISTOR (m)
PFET RESISTOR (m)
VIN (V)
Figure 12. PFET Resistor vs. VIN (Pin-to-Pin Measurements)
Figure 15. NFET Resistor vs. VIN (Pin-to-Pin Measurements)
Rev. 0 | Page 8 of 24
08301-024
594 -40
ADP2118
1350 1300
SWITCHING FREQUENCY (kHz) SWITCHING FREQUENCY (kHz)
660 640 620 600 580 560 540 520 500 2.3
1250 1200
1150 1100
1050
TJ = -40C TJ = +25C TJ = +125C
08301-026
TJ = -40C TJ = +25C TJ = +125C
08301-029
1000 2.3
2.7
3.1
3.5
3.9 VIN (V)
4.3
4.7
5.1
5.5
2.7
3.1
3.5
3.9
4.3
4.7
5.1
5.5
VIN (V)
Figure 16. Switching Frequency vs. VIN at 1.2 MHz
1.30 1.28 1.26 1.24
2.20 2.18 2.22
Figure 19. Switching Frequency vs. VIN at 600 kHz
RISING
ENABLE THRESHOLD (V)
1.20 1.18 1.16 1.14 1.12 1.10 1.08 1.06 1.04 1.02 1.00 -40
RISING
UVLO THRESHOLD (V)
1.22
2.16 2.14 2.12
FALLING
FALLING
2.10 2.08 2.06 -40
08301-027
-20
0
20
40
60
80
100
120
-20
0
20
40
60
80
100
120
TEMPERATURE (C)
TEMPERATURE (C)
Figure 17. EN Threshold vs. Temperature
5.5 5.4
Figure 20. UVLO Threshold vs. Temperature (VIN = 3.3 V)
5.5 5.4
PEAK CURRENT LIMIT (A)
PEAK CURRENT LIMIT (A)
5.3 5.2 5.1 5.0 4.9 4.8 4.7
08301-028
5.3 5.2 5.1 5.0 4.9 4.8 4.7 4.6 2.3
-20
0
20
40
60
80
100
120
TEMPERATURE (C)
VIN (V)
Figure 18. Peak Current Limit vs. Temperature (VIN = 3.3 V)
Figure 21. Peak Current Limit vs. VIN (TJ = 25C)
Rev. 0 | Page 9 of 24
08301-031
4.6 -40
2.7
3.1
3.5
3.9
4.3
4.7
5.1
5.5
08301-030
ADP2118
EN
3
3
EN VOUT
VOUT
1
1
PGOOD
2
2
PGOOD
IL
08301-032
IL
08301-035
4
4
CH1 500mV CH3 5V
CH2 5V CH4 2A
M1ms T 20.40%
A CH3
3.10V
CH1 500mV CH2 5V CH4 2A CH3 5V
M1ms T 30.2%
A CH3
3.10V
Figure 22. Soft Start with Full Load (1.2 MHz, VIN = 5 V)
Figure 25. Soft Start with Precharge (1.2 MHz, VIN = 5 V)
VOUT (AC)
1
1
VOUT (AC)
IO
08301-033
IO
08301-036
4
4
CH1 50mV CH4 2A
M200s T 30.40%
A CH4
1.36A
CH1 50mV CH4 2A
M200s T 30.40%
A CH4
1.36A
Figure 23. Load Transient (1.2 MHz, PFM, VIN = 5 V)
Figure 26. Load Transient (1.2 MHz, FPWM, VIN = 5 V)
SYNC SYNC
2 2
SW
3 3
SW
08301-034
CH2 2V CH3 2V
M 400ns T -8ns
A CH2
2.88V CH3 2V
CH2 2V
M400ns T -8ns
A CH2
2.88V
Figure 24. Synchronized to 1 MHz In Phase
Figure 27. Synchronized to 1 MHz 180 Out of Phase
Rev. 0 | Page 10 of 24
08301-037
ADP2118
VOUT
VOUT
1
1
SW
SW
2
2
IL
08301-038
IL
08301-041
4
4
CH1 500mV
CH2 5V CH4 5A
M2ms T 29.60%
A CH1
670mV
CH1 500mV CH2 5V CH4 5A
M2ms T 59.60%
A CH1
670mV
Figure 28. Output Short
Figure 31. Output Short Recovery
1
VOUT (AC)
TRK
IL
FB
1
4
SW
CH1 500mV
CH2 500mV
08301-039
M4ms T 59%
A CH2
640mV
CH1 50mV
CH2 5V CH4 1A
M4s T 64.60%
A CH4
1.72A
Figure 29. Tracking Function
VOUT (AC)
1
1
Figure 32. PFM Mode
VOUT (AC)
IL IL
4
4
SW
08301-040
SW
08301-043
2
2
CH1 10mV
CH2 5V CH4 1A
M 400ns T 57.80%
A CH2
3.90V
CH1 10mV
CH2 5V CH4 2A
M400ns T 57.8%
A CH2
3.1V
Figure 30. Discontinuous Conduction Mode (DCM)
Figure 33. Continuous Conduction Mode (CCM)
Rev. 0 | Page 11 of 24
08301-042
2
ADP2118
60 48 36 24
MAGNITUDE (dB)
1 2
200 160 120 80
MAGNITUDE (dB) PHASE (Degrees)
60 48 36 24 12 0 -12 -24 -36 -48
08301-044
1
2
200 160 120 80 40 0 -40 -80 -120
PHASE (Degrees) PHASE (Degrees) PHASE (Degrees)
08301-049 08301-048 08301-047
12 0 -12 -24 -36 -48
40 0 -40 -80 -120
-60 100
CROSS FREQUENCY: 102kHz PHASE MARGIN: 50
-160 -200
CROSS FREQUENCY: 93kHz PHASE MARGIN: 56
-160 -200
1k
10k
100k
1M
-60 100
1k
10k
100k
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 34. Bode Plot at VIN = 5 V, VOUT = 1.0 V, IO = 3 A, fS = 1.2 MHz
60 48 36 24
MAGNITUDE (dB)
1 2
Figure 37. Bode Plot at VIN = 5 V, VOUT = 1.2 V, IO = 3 A, fS = 1.2 MHz
60 48 36 24
PHASE (Degrees) MAGNITUDE (dB)
1 2
200 160 120 80 40 0 -40 -80 -120
200 160 120 80 40 0 -40 -80 -120
12 0 -12 -24 -36 -48
12 0 -12 -24 -36 -48
08301-045
-60 100
CROSS FREQUENCY: 81kHz PHASE MARGIN: 63
-160 -200
CROSS FREQUENCY: 69kHz PHASE MARGIN: 69
-160 -200
1k
10k
100k
1M
-60 100
1k
10k
100k
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 35. Bode Plot at VIN = 5 V, VOUT = 1.5 V, IO = 3 A, fS = 1.2 MHz
60 48 36 24
MAGNITUDE (dB)
1 2
Figure 38. Bode Plot at VIN = 5 V, VOUT = 1.8 V, IO = 3 A, fS = 1.2 MHz
60 48 36 24
PHASE (Degrees) MAGNITUDE (dB)
1 2
200 160 120 80 40 0 -40 -80 -120 -160
08301-046
200 160 120 80 40 0 -40 -80 -120 -160 -200
12 0 -12 -24 -36 -48
12 0 -12 -24 -36 -48
CROSS FREQUENCY: 52kHz PHASE MARGIN: 76 -60 100 1k 10k
-200
100k
1M
CROSS FREQUENCY: 46kHz PHASE MARGIN: 79 -60 100 1k 10k
100k
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 36. Bode Plot at VIN = 5 V, VOUT = 2.5 V, IO = 3 A, fS = 1.2 MHz
Figure 39. Bode Plot at VIN = 5 V, VOUT = 3.3 V, IO = 3 A, fS = 1.2 MHz
Rev. 0 | Page 12 of 24
ADP2118 FUNCTIONAL BLOCK DIAGRAM
VIN EN PVIN
ADP2118
PMOS CURRENT SENSE AMP ZCOMP UVLO
TRK FB
0.6V
SOFT START
ERRO AMP Gm SKIP MODE THRESHOLD 0.66V
PFET SKIP CMP LOGIC CONTROL SW
NFET NMOS CURRENT SENSE AMP
SLOPE COMPENSATION 0.54V PGOOD GND OSCILLATOR
CLK
SYNC/MODE
FREQ
Figure 40. Functional Block Diagram
Rev. 0 | Page 13 of 24
08301-003
ZERO CURRENT CMP
PGND
ADP2118 THEORY OF OPERATION
The ADP2118 is a step-down, dc-to-dc converter that uses fixed frequency, peak current-mode architecture with an integrated high-side switch and low-side synchronous rectifier. The high switching frequency and tiny 16-lead, 4 mm x 4 mm LFCSP_WQ package allow for a small step-down dc-to-dc converter solution. The integrated high-side switch (P-channel MOSFET) and synchronous rectifier (N-channel MOSFET) yield high efficiency at medium-to-full loads, and light load efficiency is improved by PFM mode. The ADP2118 operates with an input voltage from 2.3 V to 5.5 V and regulates the output voltage down to 0.6 V. The ADP2118 is also available with preset output voltage options of 3.3 V, 2.5 V, 1.8 V, 1.5 V, 1.2 V, and 1.0 V. output capacitor supplies all the load current. Because the output voltage dips and recovers occasionally, the output voltage ripple in this mode is larger than the ripple in the PWM mode of operation.
SLOPE COMPENSATION
Slope compensation stabilizes the internal current control loop of the ADP2118 when operating close to and beyond 50% duty cycle to prevent subharmonic oscillations. It is implemented by summing an artificial voltage ramp to the current sense signal during the on-time of the P-channel MOSFET switch. This voltage ramp depends on the output voltage. When operating at high output voltages, there is more slope compensation. The slope compensation ramp value determines the minimum inductor that can be used to prevent subharmonic oscillations.
CONTROL SCHEME
The ADP2118 uses the fixed frequency, peak current mode PWM control architecture and operates in PWM mode for medium-to-full loads but shifts to PFM mode (if enabled) at light loads to maintain high efficiency. When operating in fixed frequency PWM mode, the duty cycle of the integrated switches is adjusted to regulate the output voltage. When operating in PFM mode at light loads, the switching frequency is adjusted to regulate the output voltage. The ADP2118 operates in PWM mode when the load current is greater than the pulse-skipping threshold current. At load currents below this value, the converter smoothly transitions to the PFM mode of operation.
ENABLE/SHUTDOWN
The EN pin is a precision analog input that enables the device when the voltage exceeds 1.2 V (typical) and has 100 mV hysteresis. When the enable voltage falls below 1.1 V (typical) the part turns off. To force the ADP2118 to automatically start when input power is applied, connect EN to VIN. When the ADP2118 is shut down, the soft start capacitor is discharged. This causes a new soft start cycle to begin when the part is reenabled. An internal pull-down resistor (1 M) prevents an accidental enable if EN is left floating.
PWM MODE OPERATION
In PWM mode, the ADP2118 operates at a fixed frequency set by the FREQ pin. At the start of each oscillator cycle, the Pchannel MOSFET switch is turned on, putting a positive voltage across the inductor. Current in the inductor increases until the current sense signal crosses the peak inductor current level, turns off the P-channel MOSFET switch, and turns on the N-channel MOSFET synchronous rectifier. This puts a negative voltage across the inductor, causing the inductor current to decrease. The synchronous rectifier stays on for the rest of the cycle or until the inductor current reaches zero, which causes the zerocrossing comparator to turn off the N-channel MOSFET as well. The peak inductor current level is set by VCOMP. The VCOMP is the output of a transconductance error amplifier that compares the feedback voltage with an internal 0.6 V reference.
INTEGRATED SOFT START
The ADP2118 has integrated soft start circuitry to limit the output voltage rise time and reduce inrush current at startup. The soft start time is fixed at 2048 clock cycles. If the output voltage is precharged prior to turn-on, the ADP2118 prevents a reverse inductor current (that would discharge the output capacity) until the soft start voltage exceeds the voltage on the FB pin.
TRACKING
The ADP2118 has a tracking input, TRK, that allows the output voltage to track another voltage (master voltage). It is especially useful in core and I/O voltage tracking for FPGAs, DSPs, and ASICs. The internal error amplifier includes three positive inputs: the internal reference voltage, the soft start voltage, and the TRK voltage. The error amplifier regulates the FB voltage to the lowest of the three voltages. To track a master voltage, tie the TRK pin to a resistor divider from the master voltage. If the TRK function is not used, connect the TRK pin to VIN.
PFM MODE OPERATION
When PFM mode is enabled, the ADP2118 smoothly transitions to the variable frequency PFM mode of operation when the load current decreases below the pulse-skipping threshold current, switching only as necessary to maintain the output voltage within regulation. When the output voltage drops below regulation, the ADP2118 enters PWM mode for a few oscillator cycles to increase the output voltage back to regulation. During the wait time between bursts, both power switches are off, and the
Rev. 0 | Page 14 of 24
ADP2118
OSCILLATOR AND SYNCHRONIZATION
The internal oscillator of ADP2118 can be set to 600 kHz or 1.2 MHz. Drive the FREQ pin low for 600 kHz; drive FREQ pin high for 1.2 MHz. To synchronize the ADP2118, drive an external clock at the SYNC/MODE pin. The frequency of the external clock can be in the range of 600 kHz to 1.4 MHz. During synchronization, the converter operates in CCM mode only. If the FREQ pin is low, the switching frequency is in phase with the external clock; if the FREQ pin is high, the switching frequency is 180o out of phase with the external clock. and the low-side MOSFET turns on until the current through it reaches the limit (-0.9 A for forced continuous mode and 0 A for PFM mode). Thereafter, both the MOSFETs are held in the off state until FB falls below 0.54 V (typical), and then the part restarts. The behavior of PGOOD under this condition is described in the Power Good section.
UNDERVOLTAGE LOCKOUT (UVLO)
Undervoltage lockout circuitry is integrated on the ADP2118. If the input voltage drops below 2.1 V, the ADP2118 shuts down, and both the power switch and the synchronous rectifier turn off. When the voltage rises again above 2.2 V, the soft start period is initiated, and the part is enabled.
CURRENT LIMIT AND SHORT-CIRCUIT PROTECTION
The ADP2118 has a peak current limit protection circuit to prevent current runaway. The peak current is limited at 5.2 A. When the inductor peak current reaches the current limit value, the high-side MOSFET turns off and the low-side MOSFET turns on until the next cycle while the overcurrent counter increments. If the overcurrent counter count exceeds 10, the part enters hiccup mode. The high-side FET and low-side FET are both turned off. The part remains in this mode for 4096 clock cycles and then attempts to restart from soft start. If the current limit fault has cleared, the part resumes normal operation. Otherwise, it reenters hiccup mode again after counting 10 current-limit violations.
THERMAL SHUTDOWN
In the event that the ADP2118 junction temperature rises above 140C, the thermal shutdown circuit turns off the converter. Extreme junction temperatures can be the result of high current operation, poor circuit board design, and/or high ambient temperature. A 15C hysteresis is included so that when thermal shutdown occurs, the ADP2118 does not return to operation until the on-chip temperature drops below 125C. When coming out of thermal shutdown, soft start is initiated.
POWER GOOD
PGOOD is an active high, open-drain output and requires a resistor to pull it up to a voltage. A high indicates that the voltage on the FB pin (and therefore the output voltage) is within 10% of the desired value. A low on this pin indicates that the voltage on the FB pin is not within 10% of the desired value. There is a 16 cycle waiting period after FB is detected as being out of bounds. If FB returns to within the 10% range, it is ignored by PGOOD circuitry.
OVERVOLTAGE PROTECTION (OVP)
The output voltage is continuously monitored by a comparator through the FB pin, which is at 0.6 V (typical) under normal operation. This comparator is set to activate when the FB voltage exceeds 0.66 V (typical), thus indicating an output overvoltage condition. If the voltage remains above this threshold for 16 clock cycles, the high-side MOSFET turns off
Rev. 0 | Page 15 of 24
ADP2118 APPLICATIONS INFORMATION
This section describes the external components selection for the ADP2118. The typical application circuit is shown in Figure 41.
C1 0.1F R1 10 R2 10k
16 15 14 13
The ADP2118 uses slope compensation in the current loop to prevent subharmonic oscillations when the duty cycle is larger than 50%. The internal slope compensation limits the minimum inductor value. The negative current limit (-0.9 A) also limits the minimum inductor value. The inductor current ripple (IL) calculated by the selected inductor should not exceed 1.8 A. The peak inductor current should be kept below the peak current limit threshold value and can be calculated as
PGOOD
PVIN
VIN
EN
CIN 100F X5R, 6.3V
VIN 5V
1 2 3 4
SYNC/MODE FREQ TRK FB
PVIN 12 SW
11
L 1H COUT 100F X5R, 6.3V
ADP2118
SW 10 SW 9
VOUT 1.2V 3A
I PEAK = I O +
I L 2
Ensure that the rms current of the selected inductor is greater than the maximum load current and that its saturation current is greater than the peak current limit of the converter.
GND
5
PGND
6
PGND
7
8
PGND
OUTPUT CAPACITOR SELECTION
08301-004
RBOT 10k
RTOP 10k
The output voltage ripple, load step transient, and loop stability determine the output capacitor selection. The output ripple is determined by the ESR and the capacitance.
Figure 41. Application Circuit
OUTPUT VOLTAGE SELECTION
The output voltage of the adjustable version of the ADP2118 can be set by an external resistive voltage divider by using the following equation to set the voltage:
R VOUT = 0.6 x 1 + TOP R BOT
1 VOUT = I L x ESR + 8 x C OUT x f S

The load transient response depends on the inductor, output capacitor, and the control loop. The ADP2118 has integrated loop compensation for simple power design. Table 5 and Table 6 show the typical recommended inductors and capacitors for the ADP2118. X5R or X7R ceramic capacitors are highly recommended. Table 5. Recommended L and COUT Value at fS = 1.2 MHz
VIN (V) 3.3 3.3 3.3 3.3 3.3 5 5 5 5 5 5 VOUT (V) 1.0 1.2 1.5 1.8 2.5 1.0 1.2 1.5 1.8 2.5 3.3 L (H) 1 1 1 1 1 1 1 1 1 1 1 COUT (F) 100 + 47 100 100 100 100 100 + 47 100 100 100 100 100
To limit output voltage accuracy degradation due to FB bias current (0.1 A maximum) to less than 0.5% (maximum), ensure that RBOT is less than 30 k.
INDUCTOR SELECTION
The inductor value is determined by the operating frequency, input voltage, output voltage, and ripple current. Using a small inductor leads to larger inductor current ripple and provides fast transient response but degrades efficiency, whereas a large inductor value leads to small current ripple and good efficiency but slow transient response. As a guideline, the inductor current ripple, IL, is typically set to 1/3 of the maximum load current trade-off between the transient response and efficiency. The inductor can be calculated using the following equation:
L=
(VIN - VOUT ) x D
I L x f S
where: VIN is the input voltage. VOUT is the output voltage. IL is the inductor current ripple. D is the duty cyle.
D=
VOUT V IN
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ADP2118
Table 6. Recommended L and COUT Value at fS = 600 kHz
VIN (V) 3.3 3.3 3.3 3.3 3.3 5 5 5 5 5 5 VOUT (V) 1.0 1.2 1.5 1.8 2.5 1.0 1.2 1.5 1.8 2.5 3.3 L (H) 1.5 1.5 1.5 1.5 1.5 1.5 1.5 2.2 2.2 2.2 2.2 COUT (F) 100 + 47 100 100 100 100 100 + 47 100 100 100 100 100
A common application is coincident tracking, shown in Figure 43. Coincident tracking limits the slave output voltage to be the same as the master voltage until it reaches regulation. Connect the TRK pin to a resistor divider from the master voltage. For coincident tracking, set RTRKT = RTOP and RTRKB = RBOT. Ratiometric tracking is shown in Figure 44. The slave output is limited to a fraction of the master voltage. In this application, the slave and master voltages reach the final value at the same time. The ratio of the slave output voltage to the master voltage is a function of the two dividers.
VSLAVE V MASTER
VMASTER
1 1
RTOP R BOT RTRKT RTRKB
VSLAVE
Higher or lower inductors and output capacitors can be used in the converter, but the system stability and load transient performance need to be checked. The minimum output capacitor can be 47 F. If fS = 1.2 MHz, the inductor range is 0.8 H to 3.3 H. If fS = 600 kHz, the inductor range is 1.5 H to 3.3 H. Table 7. Recommended Inductors
Manufacturer Coilcraft Sumida Part Number MSS1038, MSS1048, MSS1260 CDRH103R, CDRH104R, CDRH105R
RTRKT
ADP2118
TRK
RTOP FB
RTRKB
Table 8. Recommended Capacitors
Manufacturer Murata Murata TDK TDK Part Number GRM32ER60J107ME20 GRM32ER60J476ME20 C3225X5R0J107M C3225X5R0J476M Description 100 F, 6.3 V, X5R, 1210 47 F, 6.3 V, X5R, 1210 100 F, 6.3 V, X5R, 1210 47 F, 6.3 V, X5R, 1210
VOLTAGE
Figure 42. Voltage Tracking
VMASTER VSLAVE
INPUT CAPACITOR SELECTION
The input capacitor reduces the input voltage ripple caused by the switch current on PVIN. Place the input capacitor as close as possible to the PVIN pin. A 22 F or 47 F ceramic capacitor is recommended. The rms current rating of the input capacitor should be larger than the following equation:
I RMS I O D 1 D
TIME
Figure 43. Coincident Tracking
VMASTER
VOLTAGE
VSLAVE
TIME
VOLTAGE TRACKING
The ADP2118 includes a tracking feature that allows the ADP2118 output (slave voltage) to be configured to track an external voltage (master voltage), as shown in Figure 42.
Figure 44. Ratiometric Tracking
Rev. 0 | Page 17 of 24
08301-007
08301-006
08301-005
RBOT
ADP2118 TYPICAL APPLICATION CIRCUITS
C1 0.1F R1 10 R2 10k
16 15 14 13
PGOOD
PVIN
VIN
EN
CIN 100F X5R, 6.3V
VIN 3.3V
1 2 3 4
SYNC/MODE FREQ TRK FB
PVIN 12 SW 11 SW 10 SW 9
L 1H COUT 100F X5R, 6.3V
ADP2118
VOUT 1.2V 3A
5
PGND
GND
6
PGND
7
PGND
8 L: MSS1038-102NL COILCRAFT CIN, COUT: C3225X5R0J107M TDK
Figure 45. 1.2 V, 3 A, 1.2 MHz Step-Down Regulator, Force Continuous Conduction Mode
C1 0.1F R1 10 R2 10k
16 15 14 13
PGOOD
VIN
PVIN
EN
CIN 100F X5R, 6.3V
VIN 5V
1 2 3 4
SYNC/MODE FREQ TRK FB
PVIN 12 SW 11 SW 10 SW 9
L 1H COUT 47F X5R, 10V
ADP2118
VOUT 2.5V 3A
PGND
PGND
5
6
7
PGND
GND
8 L: MSS1038-102NL COILCRAFT CIN: C3225X5R0J107M TDK COUT: GRM32ER61A476KE20 MURATA
Figure 46. 2.5 V, 3 A, 1.2 MHz Step-Down Regulator, Enable PFM Mode
Rev. 0 | Page 18 of 24
08301-009
RBOT RTOP 15k 47.5k
08301-008
RBOT 10k
RTOP 10k
ADP2118
C1 0.1F R1 10 R2 10k
16 15 14 13
PGOOD
1MHz EXT CLOCK
1 2 3 4
PVIN
VIN
EN
CIN 100F X5R, 6.3V
VIN 5V
SYNC/MODE FREQ TRK FB
GND PGND PGND PGND
PVIN 12 SW 11 SW 10 SW 9
L 1H COUT 100F X5R, 6.3V
ADP2118
VOUT 1.8V 3A
5
6
7
8
Figure 47. 1.8 V, 3 A Step-Down Regulator, Synchronized to 1 MHz In Phase with the External Clock
C1 0.1F R1 10 R2 10k
16 15 14 13
PGOOD
1MHz EXT CLOCK
1 2 3 4
PVIN
VIN
EN
CIN 100F X5R, 6.3V
VIN 5V
SYNC/MODE FREQ TRK FB
GND PGND PGND PGND
PVIN 12 SW 11 SW 10 SW 9
L 1H COUT 100F X5R, 6.3V
ADP2118
VOUT 1.5V 3A
5
6
7
8
Figure 48. 1.5 V, 3 A Step-Down Regulator, Synchronized to 1 MHz, 180 Out of Phase with the External Clock
Rev. 0 | Page 19 of 24
08301-011
RBOT 10k
RTOP 15k
L: MSS1038-102NL COILCRAFT CIN, COUT: C3225X5R0J107M TDK
08301-010
RBOT 10k
RTOP 20k
L: MSS1038-102NL COILCRAFT CIN, COUT: C3225X5R0J107M TDK
ADP2118
C1 0.1F R1 10 R2 10k
16 15 14 13
PGOOD
PVIN
VIN
EN
CIN 100F X5R, 6.3V
VIN 5V
1
SYNC/MODE FREQ TRK FB
PVIN 12 SW 11 SW 10 SW 9
L 1H COUT 100F X5R, 6.3V
RTRKT 10k VMASTER
2 3 4
ADP2118
VOUT 3.3V 3A
GND
RTRKB 2.21k
5
PGND
6
PGND
7
8
PGND
L: MSS1038-102NL COILCRAFT CIN, COUT: C3225X5R0J107M TDK
Figure 49. 3.3 V, 3 A, 1.2 MHz Step-Down Regulator, Tracking Mode
Rev. 0 | Page 20 of 24
08301-012
RBOT 2.21k
RTOP 10k
ADP2118 OUTLINE DIMENSIONS
PIN 1 INDICATOR 4.10 4.00 SQ 3.90 0.65 BSC 0.35 0.30 0.25
13 12 EXPOSED PAD 16 1
PIN 1 INDICATOR
2.60 2.50 SQ 2.40
4 5
9
TOP VIEW 0.80 0.75 0.70 SEATING PLANE
0.50 0.40 0.30
8
BOTTOM VIEW FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET.
0.05 MAX 0.02 NOM COPLANARITY 0.08 0.20 REF
COMPLIANT TO JEDEC STANDARDS MO-220-WGGC.
Figure 50. 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ] 4 mm x 4 mm Body, Very Very Thin Quad (CP-16-26) Dimensions shown in millimeters
ORDERING GUIDE
Model ADP2118ACPZ-R71 ADP2118ACPZ-1.0-R71 ADP2118ACPZ-1.2-R71 ADP2118ACPZ-1.5-R71 ADP2118ACPZ-1.8-R71 ADP2118ACPZ-2.5-R71 ADP2118ACPZ-3.3-R71
1
Temperature Range -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C
Output Voltage Adjustable 1.0 V 1.2 V 1.5 V 1.8 V 2.5 V 3.3 V
Package Description 16-Lead LFCSP_WQ 16-Lead LFCSP_WQ 16-Lead LFCSP_WQ 16-Lead LFCSP_WQ 16-Lead LFCSP_WQ 16-Lead LFCSP_WQ 16-Lead LFCSP_WQ
042709-A
Package Option CP-16-26 CP-16-26 CP-16-26 CP-16-26 CP-16-26 CP-16-26 CP-16-26
Z = RoHS Compliant Part.
Rev. 0 | Page 21 of 24
ADP2118 NOTES
Rev. 0 | Page 22 of 24
ADP2118 NOTES
Rev. 0 | Page 23 of 24
ADP2118 NOTES
(c)2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D08301-0-7/09(0)
Rev. 0 | Page 24 of 24

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