CXG8003Q (1/3)
il08 1.5 gbps transmitter
?op view 61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
gnd
v ecl
gnd
gnd
gnd
v ecl
v ecl
v ecl
gnd
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
gnd
gnd
v ttl
gnd
v ttl
gnd 60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
gnd
v ttl
v dd
v dd
gnd
gnd
nc
nc
v dd
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
gnd
v ttl
v dd
v dd
gnd
gnd
gnd
v ss
v ss
v ss v ttl v ttl 1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20 ? i
i
? ? o
i
i
? ? ? ? i
i
i
i
? ? ? o v ttl
id18
id19
gnd
v ttl
oclk74t
xrst
xtest1
v dd
v dd
gnd
gnd
icnt0
icnt1
icnt2
icnt3
nc
nc
v dd
opfdu 21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40 o
? ? i
i
? ? o
o
? ? i
i
? ? o
o
? i
i opfdd
gnd
v ecl
iclk74n
iclk74
v ecl
v ecl
oclk74en
oclk74e
gnd
gnd
tclk148n
tclk148
gnd
v ecl
odn
od
gnd
iref
ip 41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60 i
? ? o
? o
o
? ? ? ? ? i
? i
i
? i
i
ib
v ss
v ss
obm
v ss
op
op
gnd
gnd
gnd
v dd
v dd
isd
v ttl
id00
id01
gnd
id02
id03
v ttl 61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80 i
i
? i
i
? i
i
? i
i
? i
i
? i
i
? i
i id04
id05
gnd
id06
id07
gnd
id08
id09
v ttl
id10
id11
gnd
id12
id13
v ttl
id14
id15
gnd
id16
id17 pin
no. i/o signal pin
no. i/o signal pin
no. i/o signal pin
no. i/o signal
CXG8003Q (2/3) inputs
ib
iclk74
iclk74n
icnt0 - icnt3
id00 - id19
ip
iref
isd
tclk148
tclk148n
xrst
xtest1
outputs
obm
oclk74e
oclk74en
oclk74t
od
odn
op
opfdd
opfdu
: ld driver bias current control
: pll reference clock (74.25 mhz)
: inverted pll reference clock (74.25 mhz)
: parallel clock delay control
: 20 bits parallel signal
: ld driver peak current control
: ld driver duty control
: ld driver output control
: external clock (1.485 ghz)
: inverted external clock (1.485 ghz)
: reset
: scramble/nrz to nrzi conversion control
: ld driver bias current monitor
: 74.25 mhz parallel clock (ecl level)
: inverted 74.25 mhz parallel clock (ecl level)
: 74.25 mhz parallel clock (lvttl level)
: 1.485 gbps serial data
: inverted 1.485 gbps serial data
: ld driver peak current
: lower side of the phase comparator (pfd)
: upper side of the phase comparator (pfd)
ldd sw nrz nrzi
conv. x 9 + x 4 + 1
scramble 20 : 1
multiplexer ?20 pfd load
pulse
gen.
variable
delay 46, 47
44
6
20
21 op
obm
oclk74t
opfdu
opfdd 40
41
53
39
8 13 - 16 25
24 33
32 ip
ib
isd
iref
xtest1
id00 - id19 55, 56, 58, 59,
61, 62, 64, 65,
67, 68, 70, 71,
73, 74, 76, 77,
79, 80, 2, 3 icnt0 - icnt3 iclk74
iclk74n tclk148
tclk148n 7 xrst CXG8003Q (3/3) 36 37 29 28 od odn oclk74e oclk74en 20
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