W24L257a 32k 8 high-speed cmos static ram publication release date: december 1996 - 1 - revision a5 general description the W24L257a is a high-speed, low-power cmos static ram organized as 32768 8 bits that operates on a single 3.3-volt power supply. this device is manufactured using winbond's high performance cmos technology. features high -speed access time: 12/15/20 ns (max.) low -power consumption: - active: 200 mw (typ.) single + 3.3v power supply fully static operation all inputs and outputs directly ttl compatible three-state outputs available pack ages: 28-pin 300 mil soj, skinny dip and standard type one tsop (8 mm 13.4 mm) pin configuration 1 2 3 4 5 6 7 8 9 10 11 12 13 14 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 28-dip 28-pin tsop 28 27 26 25 24 23 22 21 20 19 18 17 16 15 v dd we a13 a8 a9 a11 oe a10 cs i/o8 i/o7 i/o6 i/o5 i/o4 a14 a12 a7 a6 a5 a4 a3 a2 a1 a0 i/o1 i/o2 i/o3 v ss oe a11 a9 a8 a13 we v dd a14 a12 a7 a6 a5 a4 a3 a10 cs i/o8 i/o7 i/o6 i/o5 i/o4 i/o3 i/o2 i/o1 a0 a1 a2 v ss block diagram a0 . . cs a14 we i/o1 i/o8 oe a r r a y v dd v ss . . data i/o decoder control core array pin description symbol description a0 - a14 address inputs i/o1 - i/o8 data inputs/outputs cs chip select input we write enable input oe output enable input v dd power supply v ss ground
W24L257a - 2 - truth table cs oe we mode i/o1 - i/o8 v dd current h x x not selected high z i sb , i sb1 l h h output disable high z i dd l l h read data out i dd l x l write data in i dd dc characteristics absolute maximum ratings parameter rating unit supply voltage to v ss potential -0.5 to +4.6 v input/output to v ss potential -0.5 to v dd +0.5 v allowable power dissipation 1.0 w storage temperature -65 to +150 c operating temperature 0 to +70 c note: exposure to conditions beyond those listed under absolute maximum ratings may adversely affect the life and reliability of the device. operating characteristics (v dd = 3.3v 5%, v ss = 0v, ta = 0 to 70 c) parameter sym . test conditions min . typ . max. unit input low voltage v il - -0.5 - +0.8 v input high voltage v ih - +2.0 - v dd +0.3 v input leakage current i li v in = v ss to v dd -10 - +10 m a output leakage current i lo v i/o = v ss to v dd, cs = v ih (min.) or oe = v ih (min.) or we = v il (max.) -10 - + 10 m a output low voltage v ol i ol = +8.0 ma - - 0.4 v output high voltage v oh i oh = -4.0 ma 2.4 - - v operating power i dd cs = v il (max.), i/o = 0 ma 12 - - 150 ma supply current cycle = min. 15 - - 120 ma duty = 100% 20 - - 100 ma standby power supply current i sb cs = v ih (min.), cycle = min. duty = 100% - - 20 ma i sb1 cs 3 v dd -0.2v - - 200 m a note: typical characteristics are at v dd = 3.3v, ta = 25 c.
W24L257a publication release date: december 1996 - 3 - revision a5 capacitance (v dd = 3.3v, ta = 25 c, f = 1 mhz) parameter sym. conditions max. unit input capacitance c in v in = 0v 6 pf input/output capacitance c i/o v out = 0v 8 pf note: these parameters are sampled but not 100% tested. ac characteristics ac test conditions parameter conditions input pulse levels 0v to 3v input rise and fall times 3 ns input and output timing reference level 1.5v output load c l = 30 pf, i oh /i ol = -4 ma/8 ma ac test loads and waveform 90% 90% 3 ns 10% 3 ns 10% r1 320 ohm 3.3v output r2 350 ohm 5 pf r2 350 ohm r1 320 ohm 3.3v output 30 pf including jig and scope 3.0v 0v including jig and scope ) ( for t clz , , , , , t olz t chz t ohz t whz t ow
W24L257a - 4 - ac characteristics, continued (v dd = 3.3v 5%, v ss = 0v, ta = 0 to 70 c) (1) read cycle parameter sym. W24L257a-12 W24L257a-15 W24L257a-20 unit min. max. min. max. min. max. read cycle time t rc 12 - 15 - 20 - ns address access time t aa - 12 - 15 - 20 ns chip select access time t acs - 12 - 15 - 20 ns output enable to output valid t aoe - 6 - 8 - 10 ns chip selection to output in low z t clz * 4 - 4 - 4 - ns output enable to output in low z t olz * 0 - 0 - 0 - ns chip deselection to output in high z t chz * - 6 - 7 - 10 ns output disable to output in high z t ohz * - 6 - 7 - 10 ns output hold from address change t oh 3 - 3 - 3 - ns * these parameters are sampled but not 100% tested (2) write cycle parameter sym. W24L257a-12 W24L257a-15 W24L257a-20 unit min. max. min. max. min. max. write cycle time t wc 12 - 15 - 20 - ns chip selection to end of write t cw 10 - 13 - 17 - ns address valid to end of write t aw 10 - 13 - 17 - ns address setup time t as 0 - 0 - 0 - ns write pulse width t wp 10 - 10 - 12 - ns write recovery time cs , we t wr 1 - 1 - 1 - ns data valid to end of write t dw 7 - 9 - 10 - ns data hold from end of write t dh 0 - 0 - 0 - ns write to output in high z t whz * - 7 - 8 - 10 ns output disable to output in high z t ohz * - 7 - 8 - 10 ns output active from end of write t ow 0 - 0 - 0 - ns * these parameters are sampled but not 100% tested
W24L257a publication release date: december 1996 - 5 - revision a5 timing waveforms read cycle 1 (address controlled) address t rc t aa t oh t oh d out read cycle 2 (chip select controlled) cs d out t clz t acs chz t read cycle 3 (output enable controlled) address t rc cs d out t aa oe t aoe t olz t oh clz t chz t t acs t ohz
W24L257a - 6 - timing waveforms, continued write cycle 1 ( oe clock) address oe cs we d out d in t wc t wr t cw t wp t as t ohz (1,4) t dw t dh t aw write cycle 2 ( oe = v il fixed) address cs we d out d in t wc t cw t as t dh t wr t wp t whz dw t (2) (3) t ow t oh aw t (1, 4) notes: 1. during this period, i/o pins are in the output state, so input signals of opposite phase to the outputs should not be applied. 2. the data output from d out are the same as the data written to d in during the write cycle. 3. d out provides the read data for the next address. 4. transition is measured 500 mv from steady state with c l = 5 pf. this parameter is guaranteed but not 100% tested.
W24L257a publication release date: december 1996 - 7 - revision a5 ordering information part no. access time ( n s) operating current max. ( m a) standby current max. ( m a) package W24L257ak-12 12 150 200 300 mil skinny W24L257ak-15 15 120 200 300 mil skinny W24L257ak-20 20 100 200 300 mil skinny W24L257aj-12 12 150 200 300 mil soj W24L257aj-15 15 120 200 300 mil soj W24L257aj-20 20 100 200 300 mil soj W24L257aq-12 12 150 200 standard type one tsop W24L257aq-15 15 120 200 standard type one tsop W24L257aq-20 20 100 200 standard type one tsop notes: 1. winbond reserves the right to make changes to its products without prior notice. 2. purchasers are responsible for performing appropriate quality assurance testing on products intended for use in applications where personal injury might occur as a consequence of product failure.
W24L257a - 8 - package dimensions 28-pin p-dip skinny 1. dimensions d max. & s include mold flash or tie bar burrs. 2. dimension e1 does not include interlead flash. 3. dimensions d & e1 include mold mismatch and are determined at the mold parting line. 6. general appearance spec. should be based on final visual inspection spec. 1.63 1.47 0.064 0.058 notes: symbol min. nom. max. max. nom. min. dimension in inches dimension in mm a b c d e a l s a 1 a 2 e 0.060 1.52 0.175 4.45 0.010 0.125 0.016 0.130 0.018 0.135 0.022 3.18 0.41 0.25 3.30 0.46 3.43 0.56 0.008 0.120 0.370 0.010 0.130 0.014 0.140 0.20 3.05 0.25 3.30 0.36 3.56 0.293 0.288 0.283 7.44 7.32 7.19 9.40 7.87 7.62 8.13 0.310 0.300 0.320 2.29 2.54 2.79 0.090 0.100 0.110 b 1 1 e e 1 a 1.388 1.400 35.26 35.56 0 15 0.055 1.40 0.350 0.330 8.38 8.89 15 0 4. dimension b1 does not include dambar protrusion/intrusion. 5. controlling dimension: inches. e a a a c e base plane mounting plane 1 a 1 e l a s 1 e d 1 b b 28 15 1 14 2 28-pin small outline j band 1 y 1 e s 1 b b c l e seating plane 1 2 a a a d e h e 14 15 28 c 0.36 0.20 0.014 0.008 symbol min. nom. max. max. nom. min. dimension in inches dimension in mm a b c d e h e l y a a s 1 1 2 e 0.010 0.25 0.140 3.56 0.027 0.095 0.016 0.100 0.018 0.105 0.022 2.41 0.41 0.69 2.54 0.46 2.67 0.56 0.077 0.004 0 10 0.710 0.087 0.730 0.097 1.96 18.03 2.21 18.54 2.46 0.285 0.265 0.245 7.24 6.73 6.22 0 0.10 7.75 7.62 7.49 0.305 0.300 0.295 8.31 8.56 8.81 0.327 0.337 0.347 1. dimensions d max. & s include mold flash or tie bar burrs. 2. dimension b does not include dambar protrusion/intrusion. 4. controlling dimension: inches. 5. general appearance spec. should be based on final visual inspection spec. notes: 3. dimensions d & e include mold mismatch and are determined at the mold parting line. e b 1 0.81 0.71 0.66 0.032 0.028 0.026 0.044 0.050 0.056 1.12 1.27 1.42 0.045 1.14 10 q
W24L257a publication release date: december 1996 - 9 - revision a5 package dimensions, continued 28-pin standard type one tsop controlling dimension: millimeters a a a 2 1 l l 1 y c e h d d b e min. dimension in inches nom. max. min. nom. max. symbol 1.20 0.05 0.15 1.05 1.00 0.95 0.17 0.10 11.70 7.90 13.20 0.50 0.00 0 0.20 0.27 0.15 0.21 11.80 11.90 8.00 8.10 13.40 13.60 0.55 0.60 0.70 0.25 0.10 3 5 0.047 0.006 0.041 0.040 0.035 0.007 0.008 0.011 0.004 0.006 0.008 0.461 0.465 0.469 0.311 0.315 0.319 0.520 0.528 0.536 0.022 0.020 0.024 0.028 0.010 0.000 0.004 0 3 5 0.002 a a b c d e e l l y 1 1 2 a h d q dimension in mm q 1 headquarters no. 4, creation rd. iii, science-based industrial park, hsinchu, taiwan tel: 886-3-5770066 fax: 886-3-5792647 http://www.winbond.com.tw/ voice & fax-on-demand: 886-2-7197006 taipei office 11f, no. 115, sec. 3, min-sheng east rd., taipei, taiwan tel: 886-2-7190505 fax: 886-2-7197502 winbond electronics (h.k.) ltd. rm. 803, world trade square, tower ii, 123 hoi bun rd., kwun tong, kowloon, hong kong tel: 852-27513100 fax: 852-27552064 winbond electronics north america corp. winbond memory lab. winbond microelectronics corp. winbond systems lab. 2730 orchard parkway, san jose, ca 95134, u.s.a. tel: 1-408-9436666 fax: 1-408-9436668 note: all data and specifications are subject to change without notice.
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