? semiconductor components industries, llc, 2008 august, 2008 ? rev. 6 1 publication order number: esd9x3.3st5g/d esd9x3.3st5g series transient voltage suppressors micro ? packaged diodes for esd protection the esd9x series is designed to protect voltage sensitive components from esd. excellent clamping capability, low leakage, and fast response time provide best in class protection on designs that are exposed to esd. because of its small size, it is suited for use in cellular phones, mp3 players, digital cameras and many other portable applications where board space is at a premium. specification features: ? low clamping voltage ? small body outline dimensions: 0.039 x 0.024 (1.0 mm x 0.60 mm) ? low body height: 0.017 (0.43 mm) max ? stand ? off voltage: 3.3 v ? 12 v ? low leakage ? response time is typically < 1 ns ? esd rating of class 3 (> 16 kv) per human body model ? iec61000 ? 4 ? 2 level 4 esd protection ? these are pb ? free devices mechanical characteristics: case: void-free, transfer-molded, thermosetting plastic epoxy meets ul 94 v ? 0 lead finish: 100% matte sn (tin) mounting position: any qualified max reflow temperature: 260 c device meets msl 1 requirements maximum ratings rating symbol value unit iec 61000 ? 4 ? 2 (esd) contact air 30 30 kv esd voltage per human body model per machine model 16 400 kv v total power dissipation on fr ? 5 board (note 1) @ t a = 25 c ? p d 150 mw junction and storage temperature range t j , t stg ? 55 to +150 c lead solder temperature ? maximum (10 second duration) t l 260 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliability. 1. fr ? 5 = 1.0 x 0.75 x 0.62 in. see application note and8308/d for further description of survivability specs. 12 pin 1. cathode 2. anode device package shipping ? ordering information esd9xxxst5g sod ? 923 8000/tape & reel marking diagram see specific marking information in the device marking column of the table on page 2 of this data sheet. device marking information http://onsemi.com sod ? 923 case 514aa ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our t ape and reel packaging specifications brochure, brd8011/d. x = specific device code m = date code x m
esd9x3.3st5g series http://onsemi.com 2 electrical characteristics (t a = 25 c unless otherwise noted) symbol parameter i pp maximum reverse peak pulse current v c clamping voltage @ i pp v rwm working peak reverse voltage i r maximum reverse leakage current @ v rwm v br breakdown voltage @ i t i t test current i f forward current v f forward voltage @ i f p pk peak power dissipation c max. capacitance @v r = 0 and f = 1 mhz *see application note and8308/d for detailed explanations of datasheet parameters. uni ? directional tvs i pp i f v i i r i t v rwm v c v br v f electrical characteristics (t a = 25 c unless otherwise noted, v f = 1.1 v max. @ i f = 10 ma for all types) device* device marking v rwm (v) i r ( a) @ v rwm v br (v) @ i t (note 2) i t max i pp (a) (note 3) v c (v) @ max i pp (note 3) p pk (w) (8 x 20 s) c (pf) v c max max min ma max typ typ per iec61000 ? 4 ? 2 (note 4) esd9x3.3st5g a 3.3 2.5 5.0 1.0 9.8 10.4 102 80 figures 1 and 2 (note 5) esd9x5.0st5g b 5.0 1.0 6.2 1.0 8.7 12.3 107 65 esd9x7.0st5g 5** 7.0 0.1 7.5 1.0 4.0 25 100 65 esd9x12st5g c 12 1.0 13.5 1.0 5.9 23.7 140 30 *other voltages available upon request. **rotated 270 degrees. 2. v br is measured with a pulse test current i t at an ambient temperature of 25 c. 3. surge current waveform per figure 5. 4. for test procedure see figures 3 and 4 and application note and8307/d. 5. esd9x5.0st5g shown below. other voltages available upon request. figure 1. esd clamping voltage screenshot positive 8 kv contact per iec 61000 ? 4 ? 2 figure 2. esd clamping voltage screenshot negative 8 kv contact per iec 61000 ? 4 ? 2
esd9x3.3st5g series http://onsemi.com 3 iec 61000 ? 4 ? 2 spec. level test voltage (kv) first peak current (a) current at 30 ns (a) current at 60 ns (a) 1 2 7.5 4 2 2 4 15 8 4 3 6 22.5 12 6 4 8 30 16 8 i peak 90% 10% iec61000 ? 4 ? 2 waveform 100% i @ 30 ns i @ 60 ns t p = 0.7 ns to 1 ns figure 3. iec61000 ? 4 ? 2 spec figure 4. diagram of esd test setup 50 50 cable tvs oscilloscope esd gun the following is taken from application note and8308/d ? interpretation of datasheet parameters for esd devices. esd voltage clamping for sensitive circuit elements it is important to limit the voltage that an ic will be exposed to during an esd event to as low a voltage as possible. the esd clamping voltage is the voltage drop across the esd protection diode during an esd event per the iec61000 ? 4 ? 2 waveform. since the iec61000 ? 4 ? 2 was written as a pass/fail spec for larger systems such as cell phones or laptop computers it is not clearly defined in the spec how to specify a clamping voltage at the device level. on semiconductor has developed a way to examine the entire voltage waveform across the esd protection diode over the time domain of an esd pulse in the form of an oscilloscope screenshot, which can be found on the datasheets for all esd protection diodes. for more information on how on semiconductor creates these screenshots and how to interpret them please refer to and8307/d. figure 5. 8 x 20 s pulse waveform 100 90 80 70 60 50 40 30 20 10 0 020406080 t, time ( s) % of peak pulse current t p t r pulse width (t p ) is defined as that point where the peak current decay = 8 s peak value i rsm @ 8 s half value i rsm /2 @ 20 s
esd9x3.3st5g series http://onsemi.com 4 typical characteristics ? 55 + 25 7.4 figure 6. typical breakdown voltage versus temperature temperature ( c) + 150 7.2 7.1 7.0 6.9 6.8 6.3 ? 55 20 figure 7. typical leakage current versus temperature temperature ( c) +25 16 12 8 4 0 breakdown voltage (volts) (v z @ i z ) i r (na) 7.3 + 150 6.7 6.6 6.5 6.4 18 14 10 6 2
esd9x3.3st5g series http://onsemi.com 5 package dimensions sod ? 923 case 514aa ? 01 issue d notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeters. 3. maximum lead thickness includes lead finish thickness. minimum lead thickness is the minimum thickness of base material. dim min nom max millimeters a 0.34 0.39 0.43 b 0.15 0.20 0.25 c 0.07 0.12 0.17 d 0.75 0.80 0.85 e 0.55 0.60 0.65 0.95 1.00 1.05 l 0.05 0.10 0.15 h e 0.013 0.015 0.017 0.006 0.008 0.010 0.003 0.005 0.007 0.030 0.031 0.033 0.022 0.024 0.026 0.037 0.039 0.041 0.002 0.004 0.006 min nom max inches d e b c a l 2x ? y ? ? x ? 0.08 (0.0032) xy h e 0.40 0.30 0.90 dimensions: millimeters *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* 2 1 on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 esd9x3.3st5g/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loca l sales representative
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