ccd area image sensor enhanced near-infrared sensitivity by using fully-depleted ccd technology S10747-0909 www.hamamatsu.com 1 the S10747-0909 is a back-illuminated ccd area image sensor that has signi cantly improved near-infrared sensitivity and soft x-ray detection ef ciency. this has been achieved by using a thick silicon substrate that allows the depletion layer to be thickened by applying a bias voltage. features applications quantum ef ciency: 70% ( =1000 nm, ta=25 c) pixel size: 24 24 m 512 512 pixels low readout noise space telescope spectral response (without window) (typ. ta=25 c) 0 100 90 80 70 60 50 40 30 20 10 200 400 600 800 1000 1200 wavelength (nm) quantum efficiency (%) S10747-0909 back-thinned ccd kmpdb0313ea soft x-ray detection efficiency x-ray energy (kev) detection efficiency (%) (calculated data, with ar coating) 0.1 1 100 10 0 20 40 60 100 80 S10747-0909 back-thinned ccd kmpdb0317ea general ratings parameter specification pixel size 24 (h) 24 (v) m number of pixels 532 (h) 520 (v) number of active pixels 512 (h) 512 (v) active area 12.288 (h) 12.288 (v) mm vertical clock phase 2 phases horizontal clock phase 2 phases output circuit one-stage mosfet source follower package 24-pin ceramic dip (refer to dimensional outline) window none (temporary glass window)
ccd area image sensor S10747-0909 2 kmpdc0332ea structure of fully-depleted back-illuminated ccd [figure 1] back-thinned ccd [figure 2] when no bias voltage is applied to thick silicon [figure 3] when a bias voltage is applied to thick silicon (fully-depleted back- illuminated ccd) back-thinned ccds the silicon substrate is only a few dozen microns thick. this means that near-infrared light is more likely t o pass through the substrate (see figure 1), thus resulting in a loss of quantum ef ciency in infrared region. thickening the silicon substrate increases the quantum ef ciency in the near-infrared region but also mak es the resolution worse since the generated charges diffuse into the neutral region unless a bias voltage is applied (see figure 2). fully-depleted back-illuminated ccds use a thick silic on sub- strate that has no neutral region when a bias voltage is applied and therefore deliver high quantum ef ciency in the near-infrared re- gion while maintaining a good resolution (see figure 3). one dra wback, however, is that the dark current becomes large so that these devices must usually be cooled to about -70 c during use. blue light near-infrared light gnd depletion layer ccd side photosensitive surface depletion layer neutral region charge diffusion gnd blue light near-infrared light ccd surface photosensitive surface depletion layer bias blue light near-infrared light ccd surface photosensitive surface absolute maximum ratings (ta=-70 c) parameter symbol min. typ. max. unit operating temperature topr -120 - +30 c storage temperature tstg -200 - +70 c substrate voltage (applied bias voltage) vss -0.5 - +30 v od voltage v od -25 - +0.5 v rd voltage v rd -18 - +0.5 v isv voltage v isv -18 - +0.5 v ish voltage v ish -18 - +0.5 v igv voltage v ig1v , v ig2v -15 - +10 v igh voltage v ig1h , v ig2h -15 - +10 v sg voltage v sg -15 - +10 v og voltage v og -15 - +10 v rg voltage v rg -15 - +10 v tg voltage v tg -15 - +10 v vertical clock voltage v p1v , v p2v -15 - +10 v horizontal clock voltage v p1h , v p2h -15 - +10 v
ccd area image sensor S10747-0909 electrical characteristics (ta=25 c) parameter symbol min. typ. max. unit signal output frequency fc - - 150 khz vertical shift register capacitance c p1v , c p2v - 600 - pf horizontal shift register capacitance c p1h , c p2h - 110 - pf summing gate capacitance c sg -20-pf reset gate capacitance c rg -30-pf transfer gate capacitance c tg -60-pf charge transfer efficiency * 1 cte 0.99995 0.99999 - - dc output level * 2 vout -15 -13 -11 v output impedance * 2 zo-3-k power consumption * 2 * 3 p - 12 13 mw * 1: charge transfer ef ciency per pixel measured at half of the full well capacity * 2: the values depend on the load resistance. (v od =-20 v, load resistance=22 k ) * 3: power consumption of the on-chip ampli er plus load resistance electrical and optical characteristics (ta=-70 c, unless otherwise noted) parameter symbol min. typ. max. unit saturation output voltage vsat - fw sv - v full well capacity vertical fw 150 200 - ke - horizontal, summing gate 600 800 - ccd node sensitivity * 4 sv 1.4 1.7 2.0 v/e - dark current * 5 ds - 1 10 e - /pixel/s readout noise * 6 nr - 30 60 e - rms dynamic range * 7 line binning dr 20000 26667 - - area scanning 5000 6666 - - photo response non-uniformity * 8 prnu - 3 10 % spectral response range ta=25 c - 300 to 1100 - nm * 4: load resistance=22 k * 5: dark current is reduced to half for every 5 to 7 c decrease in temperature. * 6: operating frequency=150 khz * 7: dynamic range = full well capacity / readout noise * 8: measured at one-half of the saturation output (full well capacity) using led light (peak emission wavelength: 560 nm) fixed pattern noise (peak to peak) signal 100 [%] photo response non-uniformity (prnu) = operating conditions (ta=-70 c) parameter symbol min. typ. max. unit output transistor drain voltage v od -22 -20 -18 v reset drain voltage v rd -13 -12 -11 v output gate voltage v og -6 -5 -4 v substrate voltage v ss 0.5 20 25 v test point vertical input source v isv -v rd -v horizontal input source v ish -v rd -v vertical input gate v ig1v , v ig2v -03v horizontal input gate v ig1h , v ig2h -03v vertical shift register clock voltage high v p1vh , v p2vh -8 -7 -6 v low v p1vl , v p2vl 234 horizontal shift register clock voltage high v p1hh , v p2hh -8 -7 -6 v low v p1hl , v p2hl 234 summing gate voltage high v sgh -8 -7 -6 v low v sgl 234 reset gate voltage high v rgh -8 -7 -6 v low v rgl 234 transfer gate voltage high v tgh -8 -7 -6 v low v tgl 234 external load resistance r l 20 22 24 k 3
ccd area image sensor S10747-0909 4 -70 -50 -60 -40 -30 -20 0 -10 10 20 temperature (c) 0.1 1 10 100 1000 100000 10000 dark current (e - /pixel/s) (typ.) dark current vs. temperature kmpdb0314ea 23 22 21 19 14 15 24 1 2 12 89 3 4 5 512 signal out 4 blank pixels 4 blank pixels 1 2 3 4 2 3 4 5 512 512 8-dummy 4-dummy 512 signal out 13 10 v=512 h=512 5 4-dummy 4 -dummy 11 device structure (conceptual drawing of top view) kmpdc0337ea
ccd area image sensor S10747-0909 parameter symbol min. typ. max. unit p1v, p2v, tg * 9 pulse width tpwv 100 - - s rise and fall times tprv, tpfv 4000 - - ns p1h, p2h * 9 pulse width tpwh 3.3 - - s rise and fall times tprh, tpfh 5 - - ns duty ratio - - 50 - % sg * 9 pulse width tpws 3.3 - - s rise and fall times tprs, tpfs 5 - - ns duty ratio - - 50 - % rg pulse width tpwr 60 - - ns rise and fall times tprr, tpfr 5 - - ns tg-p1h overlap time tovr 60 - - s * 9: symmetrical pulses should be overlapped at 50% of maximum amplitude. kmpdc0338ea p1v 123 rg os p2v, tg p1h p2h, sg integration period (shutter must be open) readout period (shutter must be closed) tpwv enlarged view tg p1h p2h, sg tov r tpwh, tpws rg os tpwr 4..519 520 512 + 8 (dummy) d1 d2 d3 d18 d19 d20 d4..d12, s1..s512, d13..d17 timing chart 5 kmpdc0338ea
ccd area image sensor S10747-0909 2.58 0.15 3.90 0.39 4.40 0.44 photosensitive surface index mark 1st pin 3.0 0.1 (24 ) 0.5 22.4 0.3 12.288 34 0.34 24 23 14 13 1 2 11 12 active area 12.288 dimensional outline (unit: mm) pin connections pin no. symbol function remark (standard operation) 1 rd reset drain -12 v 2 os output transistor source r l =22 k 3 od output transistor drain -20 v 4 og output gate -5 v 5 sg summing gate 6- 7- 8 p2h ccd horizontal register clock-2 9 p1h ccd horizontal register clock-1 10 ig2h test point (horizontal input gate-2) 0 v 11 ig1h test point (horizontal input gate-1) 0 v 12 ish test point (horizontal input source) connect to rd 13 tg transfer gate 14 p2v ccd vertical register clock-2 15 p1v ccd vertical register clock-1 16 - 17 - 18 - 19 ss substrate voltage (applied bias voltage) +20 v 20 - 21 isv test point (vertical input source) connect to rd 22 ig2v test point (vertical input gate-2) 0 v 23 ig1v test point (vertical input gate-1) 0 v 24 rg reset gate 6 kmpda0256ea
ccd area image sensor S10747-0909 www.hamamatsu.com information furnished by hamamatsu is believed to be reliable. however, no responsibility is assumed for possible inaccuracies or omissions. specifications are subject to change without notice. no patent rights are granted to any of the circuits described herein. type numbers of products listed in the specification sheets or supplied as samples may have a suffix ?(x)? which means tentativ e specifications or a suffix ?(z)? which means developmental specifications. ?2010 hamamatsu photonics k.k. hamamatsu photonics k.k., solid state division 1126-1 ichino-cho, higashi-ku, hamamatsu city, 435-8558 japan, telephone: (81) 53-434-3311, fax: (81) 53-434-5184 u.s.a.: hamamatsu corporation: 360 foothill road, p.o.box 6910, bridgewater, n.j. 08807-0910, u.s.a., telephone: (1) 908-231-0 960, fax: (1) 908-231-1218 germany: hamamatsu photonics deutschland gmbh: arzbergerstr. 10, d-82211 herrsching am ammersee, germany, telephone: (49) 8152- 375-0, fax: (49) 8152-265-8 france: hamamatsu photonics france s.a.r.l.: 19, rue du saule trapu, parc du moulin de massy, 91882 massy cedex, france, teleph one: 33-(1) 69 53 71 00, fax: 33-(1) 69 53 71 10 united kingdom: hamamatsu photonics uk limited: 2 howard court, 10 tewin road, welwyn garden city, hertfordshire al7 1bw, unit ed kingdom, telephone: (44) 1707-294888, fax: (44) 1707-325777 north europe: hamamatsu photonics norden ab: smidesv?gen 12, se-171 41 solna, sweden, telephone: (46) 8-509-031-00, fax: (46) 8 -509-031-01 italy: hamamatsu photonics italia s.r.l.: strada della moia, 1 int. 6, 20020 arese, (milano), italy, telephone: (39) 02-935-81- 733, fax: (39) 02-935-81-741 cat. no. kmpd1117e02 jul. 2010 dn o handle these sensors with bare hands or wearing cotton gloves. in addition, wear anti-static clothing or use a wrist band with an earth ring, in order to prevent electrostatic damage due to electrical charges from friction. o avoid directly placing these sensors on a work-desk or work-bench that may carry an electrostatic charge. o provide ground lines or ground connection with the work- oor, work-desk and work-bench to allow static electricity to discharge. o ground the tools used to handle these sensors, such as tweezers and soldering irons. it is not always necessary to provide all the electrostatic measur es stated above. implement these measures according to the am ount of damage that occurs. element cooling/heating temperature incline rate should be set at less than 5 k/min. precaution for use (electrostatic countermeasures) element cooling/heating temperature incline rate 7
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