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da6283.002 11 november, 2010 1/13 MAS6283 ic for 1.5625 mhz ? 40.0000 mhz vcxo ? low power ? wide supply range ? cmos (square wave) output ? very low phase noise ? low cost ? divider function ? tri state output description MAS6283 is an integrated circuit well suited to build a vcxo for telecommunication and other applications. to build a vcxo only one additional component, a crystal, is needed. features applications ? very small size ? low current consumption ? wide operating temperature range ? phase noise < -130 dbc/hz at 1 khz offset ? cmos (square wave) output ? vcxo modules ? vcxo for telecommunications systems ? vcxo for set-top boxes ? vcxo for mpeg decoder block diagram MAS6283 xin xout out pd vdd vss vc 1 nf 1/2 1/2 1/2 1/2 figure 1. block diagram of MAS6283.
da6283.002 11 november, 2010 2/13 absolute maximum ratings parameter symbol conditions min max unit note supply voltage v dd - v ss -0.3 6.0 v input pin voltage v ss -0.3 v dd + 0.3 v power dissipation (max) p max 100 mw storage temperature t st -55 150 o c latchup current limit i lut 100 ma 1) note: stresses beyond the values listed may cause a perm anent damage to the device. the device may not operate under these conditions, but it will not be destroyed note: this is a cmos device and therefore it should be h andled carefully to avoid any damage by static voltages (esd). note 1: not valid for pins xin and xout. recommended operation conditions parameter symbol conditions min typ max unit note supply voltage v dd 2.5 3.3 5.5 v 1) operating temperature t op -40 +85 o c crystal r s r s 30 60 2) note 1: it is recommended to connect a 1 nf smd capacitor b etween the vdd and vss pins. assure that capacitor resonance frequency is high enough to fil ter 3 rd harmonic. note 2: see figure 5 for negative resistance at different f requencies.
da6283.002 11 november, 2010 3/13 electrical characteristics parameter symbol conditions min typ max unit note crystal frequency range f c 25 40 mhz 1) output frequency range f o 25 40 mhz 2) output frequency range f o 1.5625 20 mhz 3) voltage control range v c 0 v dd v voltage control impedance z vc 1.2 m supply current v dd = 3.3v, f c = 35 mhz i dd no load c lout = 10 pf c lout = 30 pf c lout = 50 pf 2.0 9.3 23.8 38.3 ma supply current v dd = 5.0v, f c = 35 mhz i dd no load c lout = 10 pf c lout = 30 pf c lout = 50 pf 3.0 14.0 36.0 58.0 ma supply current xpd = 0 v i xpd v dd = 3.3 v v dd = 5.0 v 0.9 0.9 1.5 1.7 ma output symmetry 45 48-52 55 % startup time t start 2 ms output buffer enabled disabled xpd 1.6 0 v dd 0.55 v 4) crystal load capacitance c l v c = 1.65 v 8 pf 5) pulling range 0.0v < v c < 5.0v crystal s= 30 ppm/pf 285 ppm 6) note 1: crystal frequency can be divided by 2, 4, 8 and 16 . note 2: direct output. note 3: depending on chosen output divider. note 4: if the xpd pin is floating the output buffer is ac tive. oscillator is always running. at power down m ode the output is at high impedance. note 5: crystal load capacitance is dependent on a v c voltage. see figure 4 for c l for other v c voltages. note 6: for calculating crystal pulling (s), see equation 1 on the page 5.
da6283.002 11 november, 2010 4/13 pin description pin description symbol x-coordinate y-coordinate crystal oscillator output xout 214 141 voltage control input vc 885 142 power supply ground vss 1080 141 buffer output out 1106 699 power supply voltage vdd 579 698 output buffer power down control xpd 339 698 crystal/varactor oscillator input xin 153 698 note: because the substrate of the die is internally conn ected to vss, the die has to be connected to vss or left floating. please make sure that vss is the first pa d to be bonded. pick-and-place and all component as sembly are recommended to be performed in esd protected ar ea. note: pad coordinates are measured from the left bottom corner of the chip to the center of the pads. the coordinates may vary depending on sawing width and location. however, the distances between pads are accurate. ic outlines 1260 um 840 um die map reference xin vdd vc xout xpd out vss MAS6283 figure 2. ic outline of MAS6283. note1: die map reference is the actual left bottom corner of the sawn chip. note2: see coordinates in pin description. note3: die dimensions include 80 m scribes for both sides. the actual dimensions are a bit less due to the saw width.
da6283.002 11 november, 2010 5/13 external component selection quartz crystal and vcxo module information to ensure the best system performance, the crystal parameters should be considered carefully. pulling is an important parameter which can be calculated according to an equation 1. layout guidelines in th e following section should be followed. the frequency of the crystal is tuned by load capacitors. there a re integrated variable load capacitors on the MAS6283 and they are controlled by an external voltage at t he vc pin. it is recommended to connect a 1 nf capacitor between vdd and vss . the external crystal should be located as close to the chip as possible. in case of a pcb mounted module, it is usually advisable to mount a crystal on the same side with the vcxo ic to minimize stray capacitance. often vias between the crystal pins and the xin and xout pins of the vcxo ic increase stray capacitance. there should be no noisy signal traces underneath or close to the crystal. equation 1 crystal pulling sensitivity pf ppm c c c s l 6 2 0 1 10 ) (2 + ? = [values are given in the units described below] where, c l = load capacitance in series with the crystal c 0 = shunt capacitance of the crystal c 1 = motional capacitance of the crystal example 1 if we choose a crystal with the following values c l = 8.0 pf, c 0 = 2.0 pf, c 1 = 6.7 ff the equation 1 yields ( ) pf ppm s 5. 33 10 10 0.8 10 0.2 2 10 7.6 6 2 12 12 15 ? = + ? = ? ? ? if a crystal load differs from 8 pf the oscillator will have frequency offset at v c = 1.65 v. thus if you need to use 1.65 v vc voltage with a crystal which c l is other than 8 pf you have to design the crystal for a specific nominal frequency. the following guidelines show how to def ine the crystal?s nominal frequency. separate crystal c l as c l_xtal and mas ic c l as c l_ic . to define specific nominal frequency for the crysta l first calculate load difference ? c l [pf] as in an equation 2. equation 2 xtal l ic l l c c c _ _ ? = ? calculate frequency difference ? f [ppm] as in an equation 3. pulling s comes from t he equation 1. equation 3 s c f l ? = ?
da6283.002 11 november, 2010 6/13 the crystal nominal frequency f nom_xtal is calculated, as shown in an equation 4. equation 4 ?? ? ?? ? ? + = 6 _ 10 1 f f f nom xtal nom where, f nom = desired nominal frequency of the vcxo module f nom_xtal = crystal nominal frequency (without mas ic load c apacitance) crystal nominal frequency optimization is calculate d in an example 2. example 2 vcxo module target frequency f nom is 35 mhz. crystal characteristics are crystal loa d c l_xtal = 12.5 pf and pulling s = 30 ppm/pf. MAS6283 c l_ic = 8 pf when v c = 1.65 v. calculate load difference ? c l according to the equation 2. pf pf pf c c c xtal l ic l l 5.4 5. 12 8 _ _ ? = ? = ? = ? calculate frequency difference ? f according to the equation 3. ppm pf ppm pf s c f l 135 30 5.4 ? = ? = ? = ? now f nom = 35 mhz. according to the equation 4 hz f f f nom xtal nom 34995275 10 135 1 10 35 10 1 6 6 6 _ = ?? ? ?? ? ? + = ?? ? ?? ? ? + = the specified crystal has to have a nominal frequen cy of 34.995275 mhz without load capacitance. this offset is compensated with 8 pf load capacitance though a cry stal c l = 12.5 pf.
da6283.002 11 november, 2010 7/13 voltage control (v c ) figure 3. MAS6283aa v c sensitivity measured as inl % / pulling vs v c (v). MAS6283 voltage control sensitivity graph in figure 3 is measured by using 40.0 mhz crystal (c l = 8.5 pf, c 1 = 4.9 ff, c l = 1.5 pf). for crystal pulling see equation 1 in a page 5. figure 4. MAS6283 c l vs v c voltage figure 4 shows MAS6283 c l over the different v c voltages. MAS6283 vc sensitivity -3 -2.5 -2 -1.5 -1 -0.5 0 0.5 1 1.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 vc (v) inl % / pulling MAS6283 cl (pf) vs vc (v) 0 2 4 6 8 10 12 14 0 1 2 3 4 5 vc (v) cl (pf)
da6283.002 11 november, 2010 8/13 negative resistance -3000 -2500 -2000 -1500 -1000 -500 0 1,000,000 10,000,000 100,000,000 frequency [hz] negative resistance [ohm] vc 0.0v vc 1.65v vc 3.3v vc 5.5v figure 5. MAS6283 negative resistance. figure 5 shows MAS6283 negative resistance vs frequ ency with different vc voltage values measured at a room temperature. negative resistance should be at least three times crystal r s to ensure a reliable oscillation.
da6283.002 11 november, 2010 9/13 samples in sb20 dil package m a s 6 2 8 3 y y w w x x x x x . x 2 1 20 3 4 5 6 7 8 9 10 19 18 17 16 15 14 13 12 11 vc xout vss xin out xpd top marking: yyww = year, week xxxxx.x = lot number vdd figure 8. MAS6283 sb20 dil package. device outline configuration figure 9. MAS6283 msop-8 package. msop8 xout vc vss xin xpd vdd out top view 6283 ax yww a = product version x = mas internal code y = year ww= week pin 1
da6283.002 11 november, 2010 10/13 a2 b e d b1 a a gage plane q p section a - a e1 e a a1 (b) c c1 r r1 l f g m n land pattern recommendation package (msop-8) outline symbol min nom max unit a 1.10 mm a1 0 0.15 mm a2 0.75 0.85 0.95 mm b 0.22 0.38 mm b1 0.22 0.30 0.33 mm c 0.08 0.23 mm c1 0.08 0.18 mm d 3.00 bsc mm e 4.90 bsc mm e1 3.00 bsc mm e 0.65 bsc mm f 4.8 mm g 0.65 mm l (terminal length for soldering) 0.40 0.60 0.80 mm m 0.41 mm n 1.02 mm p 0 8 q 0.25 bsc mm r 0.07 mm r1 0.07 mm dimensions do not include mold or interlead flash, protrusions or gate burrs. all measurement according to jedec standard mo-187.
da6283.002 11 november, 2010 11/13 a section a-a w a o t b o k o d o d 1 p o p 1 p 2 f e user direction of feed pin 1 designator soldering information u for pb-free maximum temperature 260 c maximum number of reflow cycles 3 reflow profile thermal profile parameters stated in jesd22-a113 should not be exceeded. http://www.jedec.org seating plane co-planarity max 0.08 mm lead finish solder plate 7.62 - 25.4 m, material matte tin moisture sensitivity level (msl) 1 embossed tape specifications (msop-8) dimension min/max unit ao 5.00 0.10 mm bo 3.20 0.10 mm do 1.50 +0.1/-0.0 mm d1 1.50 min mm e 1.75 mm f 5.50 0.05 mm ko 1.45 0.10 mm po 4.0 mm p1 8.0 0.10 mm p2 2.0 0.05 mm t 0.3 0.05 mm w 12.00 +0.30/-0.10 mm
da6283.002 11 november, 2010 12/13 reel specifications (msop-8) dimension min max unit a 330 mm b 1.5 mm c 12.80 13.50 mm d 20.2 mm n 50 mm w 1 (measured at hub) 12.4 14.4 mm w 2 (measured at hub) 18.4 mm trailer 160 mm leader 390, of which minimum 160 mm of empty carrier tape sealed with cover tape mm weight 1500 g d a b c n w 1 w 2 tape slot for tape start components trailer leader carrier tape cover tape start end 5000 components on each reel reel material: conductive, plastic antistatic or st atic dissipative carrier tape material: conductive cover tape material: static dissipative
da6283.002 11 november, 2010 13/13 ordering information product code output frequency package MAS6283aatg00 f c ews tested wafers 215 m MAS6283aasn06 f c msop-8, t&r 5000 pcs / r, pb free rohs MAS6283abtg00 f c / 2 ews tested wafers 215 m MAS6283actg00 f c / 4 ews tested wafers 215 m MAS6283aetg00 f c / 16 ews tested wafers 215 m contact micro analog systems oy for divider options . contact micro analog systems oy for other wafer thi ckness. u the formation of product code product name design version output frequency package type delivery format MAS6283 a a = f c tg = 215 m thick ews tested wafer 00 = tested wafer b = f c / 2 sn = msop pb free rohs 06 = tape & reel c = f c / 4 e = f c / 16 local distributor micro analog systems oy contacts micro analog systems oy kutomotie 16 fi-00380 helsinki, finland tel. +358 10 835 1100 fax +358 10 835 1119 http://www.mas-oy.com notice micro analog systems oy reserves the right to make changes to the products contained in this data shee t in order to improve the design or performance and to supply the best possible product s. micro analog systems oy assumes no responsibilit y for the use of any circuits shown in this data sheet, conveys no license under any patent or other rights unless otherwise specifi ed in this data sheet, and makes no claim that the circuits are free from patent infrin gement. applications for any devices shown in this data sheet are for illustration only and micro analog systems oy makes no claim or warranty that such applications will be suitable for the use specified without further testing or modification.

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