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  april 2000 preliminary ? 2000 fairchild semiconductor corporation FDR6674A rev c(w) FDR6674A 30v n-channel powertrench ? ? ? ? mosfet general description this n-channel mosfet has been designed specifically to improve the overall efficiency of dc/dc converters using either synchronous or conventional switching pwm controllers. it has been optimized for ?low side? synchronous rectifier operation, providing an extremely low r ds(on) in a small package. applications ? synchronous rectifier ? dc/dc converter features ? 11.5 a, 30 v. r ds(on) = 9.5 m ? @ v gs = 4.5 v r ds(on) = 8.5 m ? @ v gs = 10 v ? high performance trench technology for extremely low r ds(on) ? high power and current handling capability in a smaller footprint than so8 d s d d s d g supersot -8 tm d 4 3 2 1 5 6 7 8 absolute maximum ratings t a =25 o c unless otherwise noted symbol parameter ratings units v dss drain-source voltage 30 v v gss gate-source voltage 12 v i d drain current ? continuous (note 1a) 11.5 a ? pulsed 50 power dissipation for single operation (note 1a) 1.8 (note 1b) 1.0 p d (note 1c) 0.9 w t j , t stg operating and storage junction temperature range -55 to +150 c thermal characteristics r ja thermal resistance, junction-to-ambient (note 1a) 70 c/w r jc thermal resistance, junction-to-case (note 1) 20 c/w package marking and ordering information device marking device reel size tape width quantity .6674a FDR6674A 13?? 12mm 2500 units FDR6674A
FDR6674A rev c(w) electrical characteristics t a = 25c unless otherwise noted symbol parameter test conditions min typ max units off characteristics bv dss drain?source breakdown voltage v gs = 0 v, i d = 250 a 30 v ? bv dss === ? t j breakdown voltage temperature coefficient i d = 250 a, referenced to 25 c 23 mv/ c i dss zero gate voltage drain current v ds = 24 v, v gs = 0 v 1 a i gssf gate?body leakage, forward v gs = 12 v, v ds = 0 v 100 na i gssr gate?body leakage, reverse v gs = ?12 v , v ds = 0 v ?100 na on characteristics (note 2) v gs(th) gate threshold voltage v ds = v gs , i d = 250 a 0.8 1.2 2 v ? v gs(th) === ? t j gate threshold voltage temperature coefficient i d = 250 a, referenced to 25 c -4 mv/ c r ds(on) static drain?source on?resistance v gs = 4.5 v, i d = 10.5 a v gs = 4.5 v, i d = 10.5 a, t j 125 c v gs = 10 v, i d = 11.5 a 8.2 11.5 6.8 9.5 16 8 m ? i d(on) on?state drain current v gs = 4.5 v, v ds = 5 v 50 a g fs forward transconductance v ds = 10 v, i d = 11.5 a 75 s dynamic characteristics c iss input capacitance 5070 pf c oss output capacitance 550 pf c rss reverse transfer capacitance v ds = 15 v, v gs = 0 v, f = 1.0 mhz 230 pf switching characteristics (note 2) t d(on) turn?on delay time 17 25 ns t r turn?on rise time 18 25 ns t d(off) turn?off delay time 69 100 ns t f turn?off fall time v dd = 10 v, i d = 1 a, v gs = 4.5 v, r gen = 6 ? 29 42 ns q g total gate charge 33 46 nc q gs gate?source charge 7.5 nc q gd gate?drain charge v ds = 15 v, i d = 11.5 a, v gs = 4.5v 6.8 nc drain?source diode characteristics and maximum ratings i s maximum continuous drain?source diode forward current 2.1 a v sd drain?source diode forward voltage v gs = 0 v, i s = 2.1 a (note 2) 0.7 1.2 v notes: 1. r ja is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the so lder mounting surface of the drain pins. r jc is guaranteed by design while r ca is determined by the user's board design. a) 70/w when mounted on a 1in 2 pad of 2 oz copper b) 125/w when mounted on a .04 in 2 pad of 2 oz copper c) 135/w when mounted on a minimum pad. scale 1 : 1 on letter size paper 2. pulse test: pulse width < 300 s, duty cycle < 2.0% FDR6674A
FDR6674A rev c(w) typical characteristics 0 10 20 30 40 50 00.511.5 v ds , drain-source voltage (v) 3.5v 2.0v v gs = 4.5v 2.5v 3.0v 0.9 1.1 1.3 1.5 0 102030405060 i d , drain current (a) v gs = 2.5v 3.0v 3.5v 4.0v 4. 5 v figure 1. on-region characteristics. figure 2. on-resistance variation with drain current and gate voltage. 0.6 0.8 1 1.2 1.4 1.6 1.8 -50 -25 0 25 50 75 100 125 150 t j , junction temperature ( o c) i d = 11.5a v gs = 10v 0.005 0.01 0.015 0.02 0.025 12.545.578.510 v gs , gate to source voltage (v) i d = 5.8 a t a = 125 o c t a = 25 o c figure 3. on-resistance variation withtemperature. figure 4. on-resistance variation with gate-to-source voltage. 0 15 30 45 60 0.5 1 1.5 2 2.5 3 v gs , gate to source voltage (v) t a = 125 o c -55 o c v ds = 5v 25 o c 0.001 0.01 0.1 1 10 100 00.20.40.60.811.21.4 v sd , body diode forward voltage (v) t a = 125 o c 25 o c -55 o c v gs = 0v figure 5. transfer characteristics. figure 6. body diode forward voltage variation with source current and temperature. FDR6674A
FDR6674A rev c(w) typical characteristics 0 1 2 3 4 5 0 10203040 q g , gate charge (nc) i d = 11.5a v ds = 5v 15v 10v 0 1000 2000 3000 4000 5000 6000 7000 8000 0 5 10 15 20 25 30 v ds , drain to source voltage (v) c iss c rss c oss f = 1mhz v gs = 0 v figure 7. gate charge characteristics. figure 8. capacitance characteristics. 0.01 0.1 1 10 100 0.1 1 10 100 v ds , drain-source voltage (v) dc 10s 1s 100ms 100 ja = 135 o c/w t a = 25 o c 10ms 1ms 0 10 20 30 40 50 0.001 0.01 0.1 1 10 100 1000 t 1 , time (sec) single pulse r ja = 135c/w t a = 25c figure 9. maximum safe operating area. figure 10. single pulse maximum power dissipation. 0.001 0.01 0.1 1 0.0001 0.001 0.01 0.1 1 10 100 1000 t 1 , time (sec) r ja (t) = r(t) + r ja r ja = 135c/w t j - t a = p * r ja (t) duty cycle, d = t 1 / t 2 p(pk) t 1 t 2 single pulse 0.01 0.02 0.05 0.1 0.2 d = 0.5 figure 11. transient thermal response curve. thermal characterization performed using the conditions described in note 1c. transient thermal response will change depending on the circuit board design. FDR6674A
ssot-8 packaging configuration: figure 1.0 components lead er tape 500mm mi nimum or 62 empty poc kets traile r tap e 300mm mi nimum or 38 empty pockets ssot-8 tape leader and trailer configuration: figur e 2.0 cover tape carrier tape note/comments packaging option ssot-8 packaging information stan da rd (no f l ow c ode ) d84z packaging type reel size tnr 13" d ia tnr 7" di a qty per reel/tube/bag 3,000 500 box dimension (mm) 343x 64x343 184x 187x 47 max qty per box 6,000 1,000 weight per unit (gm) 0.0416 0.0416 weight per reel (kg) 0.5615 0.0980 184mm x 187mm x 47mm pizza box fo r d84z option f63tnr label f63tnr label f63tnr label sampl e 343mm x 342mm x 64mm intermediate box for standar d and l99z options f63tnr label lot: cbvk741b019 fsid: fdr835n d/c1: d9842 qty1: spec rev: spec: qty: 3000 d/c2: qty2: cpn: n/f: f (f63tnr)3 ssot-8 unit orientation f 852 831n f 852 831n f 852 831n f 852 831n f 852 831n pin 1 f63tnr label antistatic cover tape customized label static dissi pative emboss ed carrier tape packaging description: ssot-8 parts are shipped in tape. the carrier tape is made fro m a di ss i pat i ve (c arbo n fi l led) po ly carb on ate resin. the cover tape is a multilayer film (heat activated adhesive in nature) primarily composed of polyester film , adhesive layer, sealant, and anti-static sprayed agent. these reeled parts in standard option are shipped w ith 3,000 u ni ts pe r 13" o r 330c m d iameter reel . th e reel s are dark blue in color and is made of polystyrene plastic (anti- static coated). other option comes in 500 unit s per 7" or 177c m d i ameter reel . th is and so me o ther o ptio ns are further described in the packagin g information table. th es e fu ll reels are in di vi du al l y ba rc od e la be l ed a nd placed inside a standard intermediate box (ill ustrated in figure 1.0) made of recyclable corrugated brown paper. one box contains two reels maximum. and t hese boxes are placed ins ide a barcode labeled shipp ing bo x whic h co mes i n di fferent s izes de pe nd in g on t h e nu mber of pa rts sh i ppe d. supersot tm -8 tape and reel data and package dimensions august 1999, rev. c
? 1998 fairchild semiconductor corporation dimensions are in millimeter pkg type a0 b0 w d0 d1 e1 e2 f p1 p0 k0 t wc tc ssot-8 (12mm) 4.47 +/-0.10 5.00 +/-0.10 12.0 +/-0.3 1.55 +/-0.05 1.50 +/-0.10 1.75 +/-0.10 10.25 mi n 5.50 +/-0.05 8.0 +/-0.1 4.0 +/-0.1 1.37 +/-0.10 0.280 +/-0.150 9.5 +/-0.025 0.06 +/-0.02 p1 a0 d1 p0 f w e1 d0 e2 b0 tc wc k0 t dimensions are in inches and millimeters tape size reel option dim a dim b dim c dim d dim n dim w1 dim w2 dim w3 (lsl-usl) 12mm 7" di a 7.00 177.8 0.059 1.5 512 +0.020/-0.008 13 +0.5/-0.2 0.795 20.2 5.906 150 0.488 +0.078/-0.000 12.4 +2/0 0.724 18.4 0.469 0.606 11.9 15.4 12mm 13" dia 13.00 330 0.059 1.5 512 +0.020/-0.008 13 +0.5/-0.2 0.795 20.2 7.00 178 0.488 +0.078/-0.000 12.4 +2/0 0.724 18.4 0.469 0.606 11.9 15.4 see detail aa dim a max 13" diameter option 7" diameter option dim a max see detail aa w3 w2 max measured at hub w1 measured at hub dim n dim d min dim c b min detail aa notes : a0, b0, and k0 dimensions are deter mined with r espec t to t he eia/jedec rs-481 rotationa l and lateral movement requi remen ts (see sketches a, b, and c). 20 deg maximum component rotation 0.5mm maximum 0.5mm maximum sketch c (top view) component lateral movement typical component cavity center line 20 deg maximum typical component center line b0 a0 sketch b (top view) component rotation sketch a (si de or front sectional view) component rotation user direction of feed ssot-8 embossed carrier tape configuration: figur e 3.0 ssot-8 reel configuration: figur e 4.0 supersot tm -8 tape and reel data and package dimensions, continued july 1999, rev. c
supersot ? -8 (fs pkg code 34, 35) 1 : 1 scale 1:1 on letter size paper dimensions shown below are in: inches [millimeters] part weight per unit (gram): 0.0416 supersot tm -8 tape and reel data and package dimensions, continued september 1998, rev. a
trademarks acex? bottomless? coolfet? crossvolt? e 2 cmos tm fact? fact quiet series? fast fastr? gto? the following are registered and unregistered trademarks fairchild semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. life support policy fairchild?s products are not authorized for use as critical components in life support devices or systems without the express written approval of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. a critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms datasheet identification product status definition advance information preliminary no identification needed obsolete this datasheet contains the design specifications for product development. specifications may change in any manner without notice. this datasheet contains preliminary data, and supplementary data will be published at a later date. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. this datasheet contains final specifications. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. this datasheet contains specifications on a product that has been discontinued by fairchild semiconductor. the datasheet is printed for reference information only. formative or in design first production full production not in production disclaimer fairchild semiconductor reserves the right to make changes without further notice to any products herein to improve reliability, function or design. fairchild does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. supersot?-8 syncfet? tinylogic? uhc? vcx? hisec? isoplanar? microwire? pop? powertrench qfet? qs? quiet series? supersot?-3 supersot?-6 ? rev. e ?


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