cystech electronics corp. spec. no. : c320s3 issued date : 2007.11.06 revised date : 2009.11.12 page no. : 1/7 mtn7002zhs3 cystek product specification n-channel mosfet MTNK1S3 description the MTNK1S3 is a n-channel enhancement-mode mosfet. features ? low on-resistance ? high esd ? high speed switching ? low-voltage drive(4v) ? easily designed drive circuits ? easy to use in parallel ? pb-free package symbol outline MTNK1S3 sot-323 g gate s source d drain g s d s d g
cystech electronics corp. spec. no. : c320s3 issued date : 2007.11.06 revised date : 2009.11.12 page no. : 2/7 mtn7002zhs3 cystek product specification absolute maximum ratings (ta=25 c) parameter symbol limits unit drain-source voltage v dss 60 v gate-source voltage v gss 20 v continuous i d 115 ma drain current pulsed i dp 700 *1 ma continuous i dr 115 ma drain reverse current pulsed i drp 700 *1 ma total power dissipation p d 200 *2 mw esd susceptibility 1250 *3 v channel temperature t ch +150 c storage temperature tstg -55~+150 c note : *1. pulse width 300 s, duty cycle 2% *2. when the device is mounted on a glass epoxy board with area measuring 1 ? 0.75 ? 0.62 inch *3. human body model, 1.5k in series with 100pf electrical characteristics (ta=25 c) symbol min. typ. max. unit test conditions bv dss* 60 - - v v gs =0, i d =10 a v gs(th) 1 - 2.5 v v ds =v gs , i d =250 a i gss - - 10 a v gs =20v, v ds =0 i dss - - 1 a v ds =60v, v gs =0 - 3.6 5.5 i d =100ma, v gs =5v r ds(on)* - 3 5 i d =100ma, v gs =10v g fs 100 - - ms v ds =10v, i d =100ma c iss - 30.5 - c oss - 9.3 - c rss - 5.9 - pf v ds =10v, v gs =0, f=1mhz *pulse test : pulse width 380 s, duty cycle 2% ordering information device package shipping MTNK1S3 sot-323 (pb-free) 3000 pcs / tape & reel
cystech electronics corp. spec. no. : c320s3 issued date : 2007.11.06 revised date : 2009.11.12 page no. : 3/7 mtn7002zhs3 cystek product specification characteristic curves typical output characteristics 0 0.05 0.1 0.15 0.2 0.25 0.3 01234 drain-source voltage -vds(v) drain current - id(a) vgs=2.2v 3.5v 4v 6v 3v typical transfer characteristics 0 0.05 0.1 0.15 0.2 0.25 0.3 01234 gate-source voltage-vgs(v) drain current -id(a) vds=10v static drain-source on-state resistance vs drain current 1 10 0.01 0.1 1 drain current-id(a) static drain-source on-state resistance-rds(on)() vgs=5v static drain-source on-state resistance vs drain current 1 10 0.01 0.1 1 drain current-id(a) static drain-source on-state resistance-rds(on)() vgs=10v static drain-source on-state resistance vs gate-source voltage 0 1 2 3 4 5 6 7 0 5 10 15 20 25 gate-source voltage-vgs(v) static drain-source on-state resistance-rds(on)() id=100ma id=50ma reverse drain current vs source-drain voltage 0.001 0.01 0.1 1 10 0 0.2 0.4 0.6 0.8 1 reverse drain current -idr(a) source-drain voltage-vsd(v)
cystech electronics corp. spec. no. : c320s3 issued date : 2007.11.06 revised date : 2009.11.12 page no. : 4/7 mtn7002zhs3 cystek product specification characteristic curves(cont.) capacitance vs drain-to-source voltage 1 10 100 0.1 1 10 100 drain-source voltage -vds(v) capacitance---(pf) c oss ciss crss power derating curve 0 50 100 150 200 250 0 50 100 150 200 ambient temperature---ta() power dissipation---pd(mw)
cystech electronics corp. spec. no. : c320s3 issued date : 2007.11.06 revised date : 2009.11.12 page no. : 5/7 mtn7002zhs3 cystek product specification reel dimension carrier tape dimension
cystech electronics corp. spec. no. : c320s3 issued date : 2007.11.06 revised date : 2009.11.12 page no. : 6/7 mtn7002zhs3 cystek product specification recommended wave soldering condition product peak temperature soldering time pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) 183 c 60-150 seconds 217 c 60-150 seconds ? time (t l ) peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak temperature(tp) 10-30 seconds 20-40 seconds ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of t he package, measured on the package body surface.
cystech electronics corp. spec. no. : c320s3 issued date : 2007.11.06 revised date : 2009.11.12 page no. : 7/7 mtn7002zhs3 cystek product specification sot-323 dimension marking: te 72 3-lead sot-323 plastic surface mounted package cystek package code: s3 style: pin 1.gate 2.source 3.drain he e a a1 q lp e1 e bp 12 3 d w b v a z detail z a c 0 12 scale mm *: typical inches millimeters inches millimeters dim min. max. min. max. dim min. max. min. max. a 0.0315 0.0433 0.80 1.10 e1 0.0256 - 0.65 - a1 0.0000 0.0039 0.00 0.10 he 0.0787 0.0886 2.00 2.25 bp 0.0118 0.0157 0.30 0.40 lp 0.0059 0.0177 0.15 0.45 c 0.0039 0.0098 0.10 0.25 q 0.0051 0.0091 0.13 0.23 d 0.0709 0.0866 1.80 2.20 v 0.0079 - 0.2 - e 0.0453 0.0531 1.15 1.35 w 0.0079 - 0.2 - e 0.0512 - 1.3 - - - 10 0 notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing specification or packing method, please c ontact your local cystek sales office. material: ? lead: pure tin plated ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0 important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitable for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance .
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