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1 pf1220-01 S1C63567 4-bit single chip microcomputer description the S1C63567 is a microcomputer which has a high-performance 4-bit cpu s1c63000 as the core cpu, rom (16,384 words 13 bits), ram (5,120 words 4 bits), serial interface, watchdog timer, programmable timer, time base counters (2 systems), svd circuit, a dot-matrix lcd driver that can drive a maximum 60 segments 17 commons, dtmf/dp generator and sound generator built-in. the S1C63567 features high speed operation and low current consumption in an operating voltage range (2.2 v to 5.5 v), this makes it suitable for applica- tions working with batteries. it is also suitable for caller id and portable data bank systems because it has a large capacity of ram built-in. features osc1 oscillation circuit ........................... 32.768 khz (typ.) crystal or 60 khz (typ.) cr oscillation circuit ( ? 1) osc3 oscillation circuit ........................... 3.58 mhz (typ.) ceramic or 1.8 mhz (typ.) cr oscillation circuit ( ? 1) instruction set .......................................... basic instruction: 46 types (411 instructions with all) addressing mode: 8 types instruction execution time ....................... during operation at 32.768 khz: 61 ?ec 122 ?ec 183 ?ec during operation at 3.58 mhz: 0.56 ?ec 1.12 ?ec 1.68 ?ec rom capacity ......................................... code rom: 16,384 words 13 bits data rom: 2,048 words 4 bits (= 8k bits) ram capacity .......................................... data memory: 5,120 words 4 bits display memory: 1,020 bits (240 words 4 bits + 60 1 bit) input port ................................................. 8 bits (pull-up resistors may be supplemented ? 1) output port .............................................. 12 bits (it is possible to switch the 8 bits to special output ? 2) i/o port .................................................... 16 bits (it is possible to switch the 2 bits to special output and the 4 bits to serial i/f input/output ? 2) serial interface ........................................ built-in (8-bit clock synchronous or asynchronous system is selectable) lcd driver ............................................... 60 segments 8, 16 or 17 commons ( ? 2) time base counter .................................. 2 sy stems (clock timer, stopwatch timer) programmable timer ............................... built-in, 2 inputs 8 bits, with event counter function watchdog timer ....................................... built-in dtmf generator ...................................... built-in dp generator ........................................... built-in sound generator ..................................... with envelope and 1-shot output functions supply voltage detection (svd) circuit ... 12 values, programmable (2.20 v to 3.30 v) (it is possible to switch 1 value to the external voltage detection ? 1) external interrupt .................................... input port interrupt: 2 systems internal interrupt ...................................... clock timer interrupt: 4 systems stopwatch timer interrupt: 2 systems programmable timer interrupt: 2 systems serial interface interrupt: 3 systems dialer interrupt: 1 system power supply voltage .............................. 2.2 v to 5.5 v low voltage operation products original architecture core cpu low current consumption wide-range operating voltage (2.2v to 5.5v) high speed operation in low voltage (0.56?ec/3.58mhz)
2 S1C63567 operating temperature range ................. -20 c to 70? current consumption (typ.) .................... low-speed operation (osc1: crystal oscillation): during halt (32 khz) 3.0 v (lcd power off) 1.5 ? 3.0 v (lcd power on) 4 ? during operation (32 khz) 3.0 v (lcd power on) 10 ? high-speed operation (osc3: ceramic oscillation): during operation (3.58 mhz) 3.0 v (lcd power on) 600 ? package .................................................. qfp8-144pin (plastic) or chip ? 1: can be selected with mask option ? 2: can be selected with software block diagram osc1 osc2 osc3 osc4 com0?6 seg0?9 v dd v c1 5 ca?c v d1 v ss svd k00?03 k10?13 test reset p00?03 p10?13 p20?23 p30?33 r00?03 r10?13 r20?23 core cpu s1c63000 rom 16,384 words 13 bits system reset control interrupt generator osc ram 5,120 words 4 bits data rom 2,048 words 4 bits lcd driver 60 seg 17 com tone dp telephone function power controller svd sound generator stopwatch timer clock timer programmable timer/counter input port serial interface i/o port output port
3 S1C63567 pin configuration pin description pin name v dd v ss v d1 v c1 v c5 ca?c osc1 osc2 osc3 osc4 k00?03 k10?13 p00?03 p10?13 p20 p21 p22 p23 p30?33 r00 r01 r02 r03 r10 r11 r12 r13 r20?23 com0?om16 seg0?eg59 svd dp tone reset test pin no. 33 27 30 81?4 87?5 28 29 31 32 79?6 75, 74, 69, 68 67?4 63?0 59 58 57 56 55?2 51 50 49 48 47 46 45 44 43?0 26?9, 88?6 18?, 142?12, 108?7 80 39 36 34 35 function power (+) supply pin power (? supply pin oscillation system regulated voltage output pin lcd system power supply pin (1/4 bias generated internally) lcd system boosting/reducing capacitor connecting pin crystal oscillation input pin crystal oscillation output pin ceramic oscillation input pin ceramic oscillation output pin input port input port i/o port i/o port (switching to serial i/f input/output is possible by software) i/o port i/o port i/o port (switching to cl signal output is possible by software) i/o port (switching to fr signal output is possible by software) i/o port output port (switching to xbz signal output is possible by software) output port (switching to bz signal output is possible by software) output port (switching to tout signal output is possible by software) output port (switching to fout signal output is possible by software) output port (switching to xtmute signal output is possible by software) output port (switching to xrmute signal output is possible by software) output port (switching to hdo signal output is possible by software) output port (switching to hfo signal output is possible by software) output port lcd common output pin (1/8, 1/16, 1/17 duty can be selected by software) lcd segment output pin svd external voltage input pin dial pulse output pin dtmf output pin initial reset input pin testing input pin i/o i o i o i i i/o i/o i/o i/o i/o i/o i/o o o o o o o o o o o o i o o i i 73 108 37 72 index 36 1 144 109 S1C63567 no. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 no. 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 no. 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 no. 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 name n.c. seg16 seg15 seg14 seg13 seg12 seg11 seg10 seg9 seg8 seg7 seg6 seg5 seg4 seg3 seg2 seg1 seg0 com7 com6 com5 com4 com3 com2 com1 com0 v ss osc1 osc2 v d1 osc3 osc4 v dd reset test tone name n.c. n.c. dp r23 r22 r21 r20 r13 r12 r11 r10 r03 r02 r01 r00 p33 p32 p31 p30 p23 p22 p21 p20 p13 p12 p11 p10 p03 p02 p01 p00 k13 k12 n.c. n.c. n.c. name n.c. k11 k10 k03 k02 k01 k00 svd v c1 v c23 v c4 v c5 cc cb ca com8 com9 com10 com11 com12 com13 com14 com15 com16 seg59 seg58 seg57 seg56 seg55 seg54 seg53 seg52 seg51 seg50 seg49 seg48 name n.c. n.c. n.c. seg47 seg46 seg45 seg44 seg43 seg42 seg41 seg40 seg39 seg38 seg37 seg36 seg35 seg34 seg33 seg32 seg31 seg30 seg29 seg28 seg27 seg26 seg25 seg24 seg23 seg22 seg21 seg20 seg19 seg18 seg17 n.c. n.c. n.c. : no connection qfp8-144pin
4 S1C63567 option list 1o sc1 system clock 1. crystal 2. cr 2 osc3 system cloc k 1. ceramic 2. cr 3 multiple key entry reset combination 1. not use 2. use (k00, k01, k02, k03) 3. use (k00, k01, k02) 4. use (k00, k01) 4 multiple key entry reset time authorize 1. not use 2. use 5 input port pull up resistor ? k00 ................ 1. with resistor 2. gate direct ? k01 ................ 1. with resistor 2. gate direct ? k02 ................ 1. with resistor 2. gate direct ? k03 ................ 1. with resistor 2. gate direct ? k10 ................ 1. with resistor 2. gate direct ? k11 ................ 1. with resistor 2. gate direct ? k12 ................ 1. with resistor 2. gate direct ? k13 ................ 1. with resistor 2. gate direct 6 output port output specification ? r0 0 ................ 1. complementary 2. nch-opendrain ? r0 1 ................ 1. complementary 2. nch-opendrain ? r0 2 ................ 1. complementary 2. nch-opendrain ? r0 3 ................ 1. complementary 2. nch-opendrain ? r1 0 ................ 1. complementary 2. nch-opendrain ? r1 1 ................ 1. complementary 2. nch-opendrain ? r1 2 ................ 1. complementary 2. nch-opendrain ? r1 3 ................ 1. complementary 2. nch-opendrain ? r2 0 ................ 1. complementary 2. nch-opendrain ? r2 1 ................ 1. complementary 2. nch-opendrain ? r2 2 ................ 1. complementary 2. nch-opendrain ? r2 3 ................ 1. complementary 2. nch-opendrain 7 i/o port output specification ? p00 ................ 1. complementary 2. nch-opendrain ? p01 ................ 1. complementary 2. nch-opendrain ? p02 ................ 1. complementary 2. nch-opendrain ? p03 ................ 1. complementary 2. nch-opendrain ? p10 ................ 1. complementary 2. nch-opendrain ? p11 ................ 1. complementary 2. nch-opendrain ? p12 ................ 1. complementary 2. nch-opendrain ? p13 ................ 1. complementary 2. nch-opendrain ? p20 ................ 1. complementary 2. nch-opendrain ? p21 ................ 1. complementary 2. nch-opendrain
5 S1C63567 ? p22 ................ 1. complementary 2. nch-opendrain ? p23 ................ 1. complementary 2. nch-opendrain ? p30 ................ 1. complementary 2. nch-opendrain ? p31 ................ 1. complementary 2. nch-opendrain ? p32 ................ 1. complementary 2. nch-opendrain ? p33 ................ 1. complementary 2. nch-opendrain 8 i/o port pull up resistor ? p0x ................ 1. with resistor 2. gate direct ? p1x ................ 1. with resistor 2. gate direct ? p20 ................ 1. with resistor 2. gate direct ? p21 ................ 1. with resistor 2. gate direct ? p22 ................ 1. with resistor 2. gate direct ? p23 ................ 1. with resistor 2. gate direct ? p3x ................ 1. with resistor 2. gate direct 9 dp port output specification 1. complementary 2. nch-opendrain 10 svd external voltage detection 1. not use 2. use 11 dtmf "dts" 1. not use 2. use electrical characteristics absolute maximum ratings rating supply voltage input voltage (1) input voltage (2) permissible total output current ? 1 operating temperature storage temperature soldering temperature / time permissible dissipation ? 2 ? 1: ? 2: ( v ss =0v ) symbol v dd v i v iosc i vdd topr tstg tsol p d value -0.5 to 7.0 -0.5 to v dd + 0.3 -0.5 to v d1 + 0.3 10 -20 to 70 -65 to 150 260 c, 10sec ( lead section ) 250 unit v v v ma c c mw the permissible total output current is the sum total of the current (average current) that simultaneously flows from the outpu t pins (or is draw in). in case of plastic package (qfp8-144pin). recommended operating conditions condition supply voltage oscillation frequency svd terminal input voltage ( ta=-20 to 70 c ) symbol v dd f osc1 f osc3 svd unit v khz khz khz mhz v max. 5.5 80 2,250 5.5 typ. 3.0 32.768 60 1,800 3.58 min. 2.2 40 0 remark v ss =0v crystal oscillation cr oscillation cr oscillation ceramic oscillation svd v dd , v ss =0v
6 S1C63567 dc characteristics characteristic high level input voltage (1) high level input voltage (2) low level input voltage (1) low level input voltage (2) low level input voltage (3) high level input current low level input current (1) low level input current (2) high level output current (1) high level output current (2) low level output current (1) low level output current (2) common output current segment output current (unless otherwise specified: v dd =3.0v, v ss =0v, f osc1 =32.768khz, ta=-20 to 70 c, v d1 /v c1 /v c23 /v c4 /v c5 are internal voltage, c 1 ? 7 =0.2 f) symbol v ih1 v ih2 v il1 v il2 v il3 i ih i il1 i il2 i oh1 i oh2 i ol1 i ol2 i oh3 i ol3 i oh4 i ol4 unit v v v v v a a a ma ma ma ma a a a a max. v dd v dd 0.2? dd 0.4 0.1? dd 0.5 0 -6 -0.6 -0.6 -25 -10 typ. -10 min. 0.8? dd 0.9? dd 0 0 0 0 -0.5 -16 1.5 1.5 25 10 condition k00?3, k10?3 p00?3, p10?3, p20?3, p30?3 reset, test k00?3, k10?3 p00?3, p10?3, p20?3, p30?3 reset, test v ih =3.0v k00?3, k10?3 p00?3, p10?3, p20?3, p30?3 reset, test v il1 =v ss k00?3, k10?3 no pull-up p00?3, p10?3, p20?3, p30?3 reset, test v il2 =v ss k00?3, k10?3 with pull-up p00?3, p10?3, p20?3, p30?3 reset, test v oh1 =0.9? dd r02, r03, r10?3, r20?3 p00?3, p10?3, p20?3, p30?3 v oh2 =0.9? dd r00, r01 v ol1 =0.1? dd r02, r03, r10?3, r20?3 p00?3, p10?3, p20?3, p30?3 v ol2 =0.1? dd r00, r01 v oh3 =v c5 -0.05v com0?6 v ol3 =v ss +0.05v v oh4 =v c5 -0.05v seg0?9 v ol4 =v ss +0.05v characteristic high level input voltage (1) high level input voltage (2) low level input voltage (1) low level input voltage (2) low level input voltage (3) high level input current low level input current (1) low level input current (2) high level output current (1) high level output current (2) low level output current (1) low level output current (2) common output current segment output current (unless otherwise specified: v dd =5.0v, v ss =0v, f osc1 =32.768khz, ta=-20 to 70 c, v d1 /v c1 /v c23 /v c4 /v c5 are internal voltage, c 1 ? 7 =0.2 f) symbol v ih1 v ih2 v il1 v il2 v il3 i ih i il1 i il2 i oh1 i oh2 i ol1 i ol2 i oh3 i ol3 i oh4 i ol4 unit v v v v v a a a ma ma ma ma a a a a max. v dd v dd 0.2? dd 0.4 0.1? dd 0.5 0 -10 -1.5 -1.5 -25 -10 typ. -15 min. 0.8? dd 0.9? dd 0 0 0 0 -0.5 -25 3.5 3.5 25 10 condition k00?3, k10?3 p00?3, p10?3, p20?3, p30?3 reset, test k00?3, k10?3 p00?3, p10?3, p20?3, p30?3 reset, test v ih =5.0v k00?3, k10?3 p00?3, p10?3, p20?3, p30?3 reset, test v il1 =v ss k00?3, k10?3 no pull-up p00?3, p10?3, p20?3, p30?3 reset, test v il2 =v ss k00?3, k10?3 with pull-up p00?3, p10?3, p20?3, p30?3 reset, test v oh1 =0.9? dd r02, r03, r10?3, r20?3 p00?3, p10?3, p20?3, p30?3 v oh2 =0.9? dd r00, r01 v ol1 =0.1? dd r02, r03, r10?3, r20?3 p00?3, p10?3, p20?3, p30?3 v ol2 =0.1? dd r00, r01 v oh3 =v c5 -0.05v com0?6 v ol3 =v ss +0.05v v oh4 =v c5 -0.05v seg0?9 v ol4 =v ss +0.05v
7 S1C63567 analog circuit characteristics and current consumption characteristic lcd drive voltage symbol v c1 v c23 v c4 v c5 unit v v v v max. 1/2? c23 0.95 typ. 1.12 3/2? c23 2? c23 typ. 1.95 1.98 2.01 2.04 2.07 2.10 2.13 2.16 2.19 2.22 2.25 2.28 2.31 2.34 2.37 2.40 min. 1/2? c23 -0.1 typ. 0.88 3/2? c23 0.95 2? c23 0.95 condition connect 1 m ? load resistor between v ss and v c1 (without panel load) connect 1 m ? load resistor lc0?="0" between v ss and v c23 lc0?="1" (without panel load) lc0?="2" lc0?="3" lc0?="4" lc0?="5" lc0?="6" lc0?="7" lc0?="8" lc0?="9" lc0?="10" lc0?="11" lc0?="12" lc0?="13" lc0?="14" lc0?="15" connect 1 m ? load resistor between v ss and v c4 (without panel load) connect 1 m ? load resistor between v ss and v c5 (without panel load) (unless otherwise specified: v dd =3.0v, v ss =0v, f osc1 =32.768khz, c g =25pf, ta=-20 to 70 c, v d1 /v c1 /v c23 /v c4 /v c5 are internal voltage, c 1 ? 7 =0.2 f) svd voltage (ta=25 c) svd voltage (external) ? 3 svd circuit response time current consumption (ta=25 c) ? 1: ? 2: ? 3: v svd1 v svd2 t svd i op v v s a a a a a a a a a typ. 1.07 1.05 100 3 8 19 80 1,000 300 800 15 6 2.20 2.20 2.20 2.20 2.20 2.30 2.40 2.50 2.60 2.70 2.80 2.90 3.00 3.10 3.20 3.30 0.95 1.5 4 10 45 800 150 600 typ. 0.93 0.85 1 0.5 without panel load. the svd circuit is off. oscc = "0" please input the voltage, which is within the range between v ss and v dd , into the svd terminal. svds0?="0" (internal) svds0?="1" svds0?="2" svds0?="3" svds0?="4" svds0?="5" svds0?="6" svds0?="7" svds0?="8" svds0?="9" svds0?="10" svds0?="11" svds0?="12" svds0?="13" svds0?="14" svds0?="15" svds0?="0" (external), ta = 25 c ta = 25 c during halt (32 khz crystal oscillation) during execution (32 khz crystal oscillation) during execution 60 khz cr oscillation) during execution (1,800 khz cr oscillation) during halt (3.58 mhz ceramic oscillation) during execution (3.58 mhz ceramic oscillation) svd circuit current (during supply voltage detection) v dd =2.2 to 5.5 v svd circuit current (during external voltage detection) v dd =2.2 to 5.5 v lcd power off ? 1 , ? 2 lcd power on ? 1 , ? 2 lcd power on ? 1 , ? 2 lcd power on ? 1 , ? 2 lcd power on ? 1 lcd power on ? 1 lcd power on ? 1
8 S1C63567 osc1 cr oscillation frequency-resistance characteristic resistor value for cr oscillation r cr1 [ ? ] cr oscillation frequency f osc1 [hz] v dd = 2.2 to 5.5 v v ss = 0 v ta = 25 c typ. value 20k 30k 40k 50k 60k 70k 80k 90k 100k 110k 120k 500k 600k 700k 800k 900k 1m 1.1m 1.2m 1.4m 1.3m 1.5m osc3 cr oscillation frequency-resistance characteristic resistor value for cr oscillation r cr2 [ ? ] cr oscillation frequency f osc3 [hz] v dd = 2.2 to 5.5 v v ss = 0 v ta = 25 c typ. value 2.5m 2.3m 2.1m 1.9m 1.7m 1.5m 1.3m 1.1m 900k 30k 40k 50k 60k 70k 80k 90k 100k 120k 110k oscillation characteristics the oscillation characteristics change depending on the conditions (components used, board pattern, etc.). use the follow- ing characteristics as reference values. osc1 crystal oscillation circuit characteristic oscillation start voltage oscillation stop voltage built-in capacitance (drain) frequency/voltage deviation frequency/ic deviation frequency adjustment range harmonic oscillation start voltage permitted leak resistance symbol vsta vstp c d ? f/ ? v ? f/ ? ic ? f/ ? c g v hho r leak unit v v pf ppm ppm ppm v m ? max. 10 10 typ. 14 20 min. 2.2 2.2 -10 10 5.5 200 condition t sta 3sec ( v dd ) t stp 10sec ( v dd ) including the parasitic capacitance inside the ic (in chip) v dd =2.2 to 5.5v c g =5 to 25pf c g =5pf ( v dd ) between osc1 and v ss (unless otherwise specified: v dd =3.0v, v ss =0v, f osc1 =32.768khz, c g =25pf, c d =built-in, ta=-20 to 70 c) osc1 cr oscillation circuit characteristic oscillation frequency dispersion oscillation start voltage oscillation start time oscillation stop voltage symbol f osc1 vsta t sta vstp unit % v ms v max. 30 3 typ. 60khz min. -30 2.2 2.2 condition (v dd ) v dd =2.2 to 5.5v (v dd ) (unless otherwise specified: v dd =3.0v, v ss =0v, r cr1 =600k ? , ta=-20 to 70 c) osc3 ceramic oscillation circuit characteristic oscillation start voltage oscillation start time oscillation stop voltage symbol vsta t sta vstp unit v ms v max. 5 typ. min. 2.2 2.2 condition (v dd ) v dd =2.2 to 5.5v (v dd ) (unless otherwise specified: v dd =3.0v, v ss =0v, ceramic oscillator: 3.58mhz, c gc =c dc =30pf, ta=-20 to 70 c) osc3 cr oscillation circuit characteristic oscillation frequency dispersion oscillation start voltage oscillation start time oscillation stop voltage symbol f osc3 vsta t sta vstp unit % v ms v max. 25 3 typ. 1,800khz min. -25 2.2 2.2 condition (v dd ) v dd =2.2 to 5.5v (v dd ) (unless otherwise specified: v dd =3.0v, v ss =0v, r cr2 =47k ? , ta=-20 to 70 c)
9 S1C63567 serial interface ac characteristics clock synchronous master mode ?during 32 khz operation characteristic transmitting data output delay time receiving data input set-up time receiving data input hold time symbol t smd t sms t smh unit s s s max. 5 typ. min. 10 5 (condition: v dd =3.0v, v ss =0v, ta=-20 to 70 c, v ih1 =0.8v dd , v il1 =0.2v dd , v oh =0.8v dd , v ol =0.2v dd ) ?during 1 mhz operation characteristic transmitting data output delay time receiving data input set-up time receiving data input hold time symbol t smd t sms t smh unit ns ns ns max. 200 typ. min. 400 200 note that the maximum clock frequency is limited to 1 mhz. (condition: v dd =3.0v, v ss =0v, ta=-20 to 70 c, v ih1 =0.8v dd , v il1 =0.2v dd , v oh =0.8v dd , v ol =0.2v dd ) clock synchronous slave mode ?during 32 khz operation characteristic transmitting data output delay time receiving data input set-up time receiving data input hold time symbol t ssd t sss t ssh unit s s s max. 10 typ. min. 10 5 (condition: v dd =3.0v, v ss =0v, ta=-20 to 70 c, v ih1 =0.8v dd , v il1 =0.2v dd , v oh =0.8v dd , v ol =0.2v dd ) ?during 1 mhz operation characteristic transmitting data output delay time receiving data input set-up time receiving data input hold time symbol t ssd t sss t ssh unit ns ns ns max. 500 typ. min. 400 200 note that the maximum clock frequency is limited to 1 mhz. (condition: v dd =3.0v, v ss =0v, ta=-20 to 70 c, v ih1 =0.8v dd , v il1 =0.2v dd , v oh =0.8v dd , v ol =0.2v dd ) sclk out sout sin v oh v oh v ol t sms t smh t smd v ih1 v il1 v ol sclk in sout sin v ih1 v oh v ol t sss t ssh t ssd v ih1 v il1 v il1
10 S1C63567 characteristic curves (reference value) power current - frequency characteristics ?ceramic oscillation (during operation) ta = 25?c 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 f osc [mhz] typ. i vdd [ma] 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 max. asynchronous system characteristic start bit detection error time ? 1 erroneous start bit detection range time ? 2 ? 1: ? 2: symbol t sa 1 t sa 2 unit s s max. t /16 10 t /16 typ. min. 0 9 t /16 start bit detection error time is a logical delay time from inputting the start bit until internal sampling begins operating. (time as far as ac is excluded.) erroneous start bit detection range time is a logical range to detect whether a low level (start bit) has been input again after a start bit has been detected and the internal sampling clock has started. when a high level is detected, the start bit d etection circuit is reset and goes into a wait status until the next start bit. (time as far as ac is excluded.) (condition: v dd =2.2 to 5.5v, v ss =0v, ta=-20 to 70 c) t sa 1 t t sa 2 sin start bit sampling clock erroneous start bit detection signal stop bit timing chart system clock switching oscc clkchg 5 msec min. 1 instruction execution time or longer
11 S1C63567 output current characteristics ?high level output current (pxx, rxx, bz) ta = 70?c, max. value 0.0 0 -1 -2 -3 -4 0.2 0.4 0.6 v dd ? oh [v] v dd = 3.0 v v dd = 5.0 v i oh [ma] 0.8 1.0 ?low level output current (pxx, rxx, bz) ta = 70?c, min. value 1.0 0 1 2 3 4 5 6 7 0.8 0.6 0.4 v ol [v] v dd = 3.0 v v dd = 5.0 v i ol [ma] 0.2 0.0
12 S1C63567 ?high level output current (segxx) ta = 70?c, max. value 0.0 0.0 -0.2 -0.4 -0.6 -0.8 -1.0 -1.2 -1.4 -1.6 -1.8 -2.0 0.2 0.4 0.6 v dd ? oh [v] v dd = 3.0 v v dd = 5.0 v i oh [ma] 0.8 1.0 ?low level output current (segxx) ta = 70?c, min. value 1.0 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 0.8 0.6 0.4 v ol [v] v dd = 3.0 v v dd = 5.0 v i ol [ma] 0.2 0.0
13 S1C63567 28 0.1 31.2 0.4 73 108 28 0.1 31.2 0.4 37 72 index 0.3 0.1 36 1 144 109 3.35 0.1 0.1 3.65 max 0.6 0.2 0 10 0.15 0.05 0.65 1.6 package dimensions plastic qfp8-144pin unit: mm
14 S1C63567 basic external connection diagram svd ca cb cc v dd v d1 osc1 osc2 osc3 osc4 reset v ss c 3 c gx c dc c res c p + x'tal cr k00?03 k10?13 p00?03 p10 (sin) p11 (sout) p12 (sclk) p13 (srdy) p20 p21 p22 (cl) p23 (fr) p30?33 r00 (xbz) r01 (bz) r02 (tout) r03 (fout) r10 (xtmute) r11 (xrmute) r12 (hdo) r13 (hfo) r20?23 seg0 | seg59 com0 | com16 c 4 c 5 c 6 c 7 lcd panel 60 17 c gc test v c1 v c23 v c4 v c5 dp tone piezo coil i/o input c 1 c 2 S1C63567 [the potential of the substrate (back of the chip) is v ss .] tip ring rectifier on off hook switch 3 v speech network hs ? 3 ? 2 r cr2 ? 1 ? 2 r cr1 ? 1: crystal oscillation ? 2: cr oscillation ? 3: ceramic oscillation x'tal c gx r cr1 cr c gc c dc r cr2 c 1 ? 7 c p c res crystal oscillator trimmer capacitor resistor for osc1 cr oscillation ceramic oscillator gate capacitor drain capacitor resistor for osc3 cr oscillation capacitor capacitor reset terminal capacitor 32.768 khz, c i (max.) = 34 k ? 5?5 pf 600 k ? (60 khz) 3.58 mhz (3.0 v) 30 pf 30 pf 47 k ? (1.8 mhz) 0.2 f 3.3 f 0.1 f note: the above table is simply an example, and is not guaranteed to work.
15 S1C63567 x (0, 0) y 4.64 mm 4.39 mm 1 70 75 80 85 90 95 5 10 15 20 35 40 45 100 105 110 115 die no. 25 50 55 60 120 30 65 130 125 pad layout diagram of pad layout chip thickness: 400 ? pad opening: 100 ? pad coordinates no. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 pad name dp r23 r22 r21 r20 r13 r12 r11 r10 r03 r02 r01 r00 p33 p32 p31 p30 p23 p22 p21 p20 p13 p12 p11 p10 p03 p02 p01 p00 k13 k12 x 1756 1631 1505 1380 1255 1130 1014 899 783 668 552 437 321 206 90 -26 -141 -257 -372 -488 -603 -719 -834 -950 -1065 -1181 -1306 -1431 -1556 -1682 -1807 y 2185 2185 2185 2185 2185 2185 2185 2185 2185 2185 2185 2185 2185 2185 2185 2185 2185 2185 2185 2185 2185 2185 2185 2185 2185 2185 2185 2185 2185 2185 2185 no. 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 pad name k11 k10 k03 k02 k01 k00 svd v c1 v c23 v c4 v c5 cc cb ca com8 com9 com10 com11 com12 com13 com14 com15 com16 seg59 seg58 seg57 seg56 seg55 seg54 seg53 seg52 seg51 seg50 seg49 seg48 x -2060 -2060 -2060 -2060 -2060 -2060 -2060 -2060 -2060 -2060 -2060 -2060 -2060 -2060 -2060 -2060 -2060 -2060 -2060 -2060 -2060 -2060 -2060 -2060 -2060 -2060 -2060 -2060 -2060 -2060 -2060 -2060 -2060 -2060 -2060 y 2046 1921 1796 1670 1545 1420 1304 1189 1073 958 842 727 611 496 380 265 149 34 -82 -197 -313 -428 -544 -674 -790 -905 -1021 -1136 -1252 -1367 -1493 -1618 -1743 -1868 -1994 no. 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 pad name seg47 seg46 seg45 seg44 seg43 seg42 seg41 seg40 seg39 seg38 seg37 seg36 seg35 seg34 seg33 seg32 seg31 seg30 seg29 seg28 seg27 seg26 seg25 seg24 seg23 seg22 seg21 seg20 seg19 seg18 seg17 x -1781 -1656 -1531 -1406 -1280 -1155 -1040 -924 -809 -693 -578 -462 -347 -231 -116 0 116 231 347 462 578 693 809 924 1040 1155 1280 1406 1531 1656 1781 y -2185 -2185 -2185 -2185 -2185 -2185 -2185 -2185 -2185 -2185 -2185 -2185 -2185 -2185 -2185 -2185 -2185 -2185 -2185 -2185 -2185 -2185 -2185 -2185 -2185 -2185 -2185 -2185 -2185 -2185 -2185 no. 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 pad name seg16 seg15 seg14 seg13 seg12 seg11 seg10 seg09 seg08 seg07 seg06 seg05 seg04 seg03 seg02 seg01 seg00 com7 com6 com5 com4 com3 com2 com1 com0 v ss osc1 osc2 v d1 osc3 osc4 v dd reset test tone x 2060 2060 2060 2060 2060 2060 2060 2060 2060 2060 2060 2060 2060 2060 2060 2060 2060 2060 2060 2060 2060 2060 2060 2060 2060 2060 2060 2060 2060 2060 2060 2060 2060 2060 2060 y -1917 -1792 -1667 -1541 -1416 -1291 -1175 -1060 -944 -829 -713 -598 -482 -367 -251 -136 -20 110 226 341 457 572 688 803 919 1034 1150 1265 1381 1496 1622 1747 1872 1997 2123 unit: m
S1C63567 notice: no part of this material may be reproduced or duplicated in any form or by any means without the written permission of seiko ep son. seiko epson reserves the right to make changes to this material without notice. seiko epson does not assume any liability of any kind arising out of any inaccuracies contained in this material or due to its application or use in any product or circuit and, further, there is n o representation that this material is applicable to products requiring high level reliability, such as, medical products. moreover, no license to an y intellectual property rights is granted by implication or otherwise, and there is no representation or warranty that anything made in accord ance with this material will be free from any patent or copyright infringement of a third party. this material or portions thereof may contain technology or the subject relating to strategic products under the control of the foreign exchange and foreign trade law of japan and may require an export license from the ministry of international trade and industry or other approval from another government agency. ? seiko epson corporation 2001 all right reserved. seiko epson corporation electronic devices marketing division ic marketing & engineering group ed international marketing department europe & u.s.a. 421-8, hino, hino-shi, tokyo 191-8501, japan phone : 042-587-5812 fax : 042-587-5564 ed international marketing department asia 421-8, hino, hino-shi, tokyo 191-8501, japan phone : 042-587-5814 fax : 042-587-5110 http://www.epson.co.jp/device/ epson electronic devices website issue august, 2001 printed in japan l

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