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02048-dsh-001-b march 2003 preliminary information cx02048 low power 3.3 volt limiting amplifier for data rates to 3.3 gbps data sheet features description applications pin descriptions measurement tables functional description information provided in this data sheet is preliminary and is subject to change without notice. mindspeed technologies?, inc, proprietary and confidential applications information please use this data sheet in conjunction with the technical information: cx02048 product bulletin: 02048-pbd-001-b cx02048 application note: note 0019 rev 01 bcc package application note: an0004 rev 01 bare die application note: note 0024 rev 02
02048-dsh-001-b page 2 of 15 cx02048 low power 3.3 volt limiting amplifier for data rates to 3.3 gbps preliminary information information provided in this data sheet is preliminary and is subject to change without notice. mindspeed technologies?, proprietary and confidential t able of c ontents features ...................................................................................................................... .....................................3 applications .................................................................................................................. ....................................3 connections ................................................................................................................... ...................................3 description ................................................................................................................... .....................................3 table 1 ordering information .................................................................................................. ..........................3 top level diagram ............................................................................................................. ..............................3 table 2 pin descriptions ...................................................................................................... .............................4 table 3 absolute maximum ratings .............................................................................................. ...................5 table 4 recommended operating conditions ...................................................................................... ...........5 table 5 dc characteristics .................................................................................................... ...........................6 table 6 ac characteristics .................................................................................................... ...........................7 functional block diagram ...................................................................................................... ...........................8 functional description ........................................................................................................ ..............................8 overview ...................................................................................................................... .....................................8 inputs ........................................................................................................................ ........................................8 outputs ....................................................................................................................... ......................................8 dc offset compensation ........................................................................................................ ..........................8 signal level detector ......................................................................................................... ..............................8 jam function .................................................................................................................. ..................................9 bias .......................................................................................................................... .........................................9 rssi .......................................................................................................................... .......................................9 applications circuit (1) 400 mvpp-diff ........................................................................................ ......................9 applications circuit (2) 800 mvpp - diff ...................................................................................... ......................10 applications information ...................................................................................................... .............................10 setting output swing level .................................................................................................... ..........................10 setting signal detect level ................................................................................................... ...........................10 table 7 resistor values ....................................................................................................... ............................10 typical signal detect level ................................................................................................... ...........................11 rssi characteristics .......................................................................................................... ..............................11 package information ........................................................................................................... ..............................12 bare die ...................................................................................................................... ......................................13 table 8 pad co-ordinates ...................................................................................................... ...........................13 disclaimer .................................................................................................................... .....................................14 contact information ............................................................................................................ ...............................15
02048-dsh-001-b page 3 of 15 cx02048 low power 3.3 volt limiting amplifier for data rates to 3.3 gbps preliminary information information provided in this data sheet is preliminary and is subject to change without notice. mindspeed technologies?, proprietary and confidential f eatures ! wide dynamic range with 5 mv input sensitivity at 3.3 gbps ! programmable input signal level detect ! fully differential ! cml data outputs with default <80 ps rise and fall time ! temperature range 0 to +85c ! operates with +3.3 v supply ! supply current typically 26 ma ! programmable output amplitude (default 400 mvpp differential) ! on-chip dc offset cancellation circuit; no external capacitors needed a pplications ! 3.3 gbps sdh/sonet with fec ! 2.5 gbps stm-16/oc-48 sdh/sonet ! 2.12 gbps fibre channel c onnections d escription the cx02048 is an integrated high-gain limiting amplifier intended for high-speed fiber optics based communications. placed following the photodetector and transimpedance amplifier, the limiting amplifier provides the necessary gain to ensure full cml output swing even at minimum input sensitivity. capable of operating over a very wide frequency range, the cx02048 supports data rates up to 3.3 gbps. the cx02048 also includes a programmable signal level detector, allowing the user to set the threshold at which the status logic outputs are enabled. t able 1 o rdering i nformation please see application note cx02048-note 0019. t op l evel d iagram 5 9 13 (gnd) 1 2 3 4 12 11 10 6 7 8 16 15 14 r ssi amp set d out d out v cc d v set n/c n/c d in d in i ref jam st st 4mm 4mm v cc a v cc a fig. 1 bcc++16 package top view part number pin package cx02048diewp waffle packed die cx02048wafer expanded whole wafer on a grip ring cx02048b16 bcc++16 CX02048B16TR bcc++16 tape and reel m02048-evm evaluation board amp set limiting amplifier cml buffer level detector amplitude control d in 50 50 100 100 d out cmos buffer comparator threshold setting circuit biasing jam i ref st v set st d out d in r ssi v cc a v cc d fig. 2
02048-dsh-001-b page 4 of 15 cx02048 low power 3.3 volt limiting amplifier for data rates to 3.3 gbps preliminary information information provided in this data sheet is preliminary and is subject to change without notice. mindspeed technologies?, proprietary and confidential t able 2 p in d escriptions die pads bcc++16 name function 23 1 r ssi receiver signal strength indication. connect to ground with a 4.7 nf capacitor (referenced to v cc ) 12 amp set enables setting of output voltage swing from 400 mv pp differential to 800 mv pp differential using an external 1% resistor (r ampset to ground) 2 - gndd digital ground 3 - gndd digital ground 43 d out inverting differential data output 54 d out non-inverting differential data output 6 - gndd digital ground 75 v cc d digital positive supply 86 v cc a analog positive supply 9 - gnda analog ground 10 7 v set signal detect threshold setting input. user programmed with 1% resistor (r set ) to v cc 11 - gnda analog ground - 8 nc not connected - 9 nc not connected 12 10 d in non-inverting data input 13 11 d in inverting data input 14 - gnda analog ground 15 - gnda analog ground 16 12 v cc a analog positive supply 17 13 i ref this pin generates an on-chip reference current, and must be connected via an external 1% resistor (r ref ) to ground 18 - gnda analog ground 19 14 jam when high data outputs d out and d out are disabled (d out being held low and d out being held high) 20 15 st logical inverse of st pin. may be connected to jam pin to enable automatic jam function on output. this is an open drain output with an internal 100k ? pull-up 21 16 st input signal level status. this output is low when the input signal is below the set threshold. this is an open drain output with an internal 100k ? pull-up 22 - gnda analog ground - center gnd ground. connect via die-plate
02048-dsh-001-b page 5 of 15 cx02048 low power 3.3 volt limiting amplifier for data rates to 3.3 gbps preliminary information information provided in this data sheet is preliminary and is subject to change without notice. mindspeed technologies?, proprietary and confidential t able 3 a bsolute m aximum r atings these are the absolute maximum ratings at or beyond which the ic can be expected to fail or be damaged. reliable operation at these extremes for any length of time is not implied. note: the die-plate must be adequately grounded to ensure correct thermal and electrical performance, and it is recommended that vias are inserted through to a lower ground plane. t able 4 r ecommended o perating c onditions parameter rating units power supply voltage (v cc -gnd) -0.5 to +6v v operating ambient temperature 0 to +85 c storage temperature -65 to +150 c parameter rating units power supply (v cc -gnd) 3.3 10% v junction temperature 0 to +110 c operating ambient 0 to +85 c
02048-dsh-001-b page 6 of 15 cx02048 low power 3.3 volt limiting amplifier for data rates to 3.3 gbps preliminary information information provided in this data sheet is preliminary and is subject to change without notice. mindspeed technologies?, proprietary and confidential t able 5 dc c haracteristics (v cc = +3.3 v + 10%, t a = 0 c to +85 c, unless otherwise specified) note 1: the maximum single-ended output value when ac-coupled into a 50 ? load is 200 mvpp ( r ampset = 0 ? ) . when connected as shown in fig. 3, the maximum ac-coupled output value is 300 mvpp ( r ampset = 820 ? ) . when dc coupled, the maximum single-ended output is 400 mvpp. for more information, please refer to product bulletin 02048-pbd-001-b. parameter conditions min. typ. max. units supply current (i cc ) ac-coupled 50 ? load 400 mvpp differential output amplitude -2633ma 800 mv p-p differential output amplitude - 32.5 41 ma cml outputs low r ampset = 0 ? (note 1), output load ac- or dc-coupled 50 ? to v cc single ended v cc -0.21 v cc -0.2 v cc -0.19 v cml outputs high r ampset = 0 ? (note 1), output load ac- or dc-coupled 50 ? to v cc single ended v cc -0.02 v cc v cml outputs low r ampset = 820 ? (note 1), output load dc- coupled 50 ? to v cc single ended v cc -0.42 v cc -0.4 v cc -0.38 v cml outputs high r ampset = 820 ? (note 1), output load dc- coupled 50 ? to v cc single ended v cc -0.04 v cc v data input differential input resistance (2 x 50 ? to v cc internally) 85 100 115 ? data output differential output impedance (2 x 100 ? to v cc internally) 170 200 230 ? status output high voltage 10 k ? pull up resistor v cc -0.1 v status output low voltage 10 k ? pull up resistor 100 mv jam input high voltage 1.33 v jam input low voltage 1.1 v status output sink current 1.5 - - v
02048-dsh-001-b page 7 of 15 cx02048 low power 3.3 volt limiting amplifier for data rates to 3.3 gbps preliminary information information provided in this data sheet is preliminary and is subject to change without notice. mindspeed technologies?, proprietary and confidential t able 6 ac c haracteristic (v cc = +3.3 v + 10%, t a = 0 c to +85 c, unless otherwise specified) note 1: hysteresis of 4.5db electrical, corresponds to 2.25db optical hysteresis. note 2: the rise and fall times are defined as 20% to 80% of each output. the output is ac-coupled into 50 ? to ground. note 3: refers to assert level (asserted when st switches from logic 0 to logic 1). o utput c onnection for m aximum ac- coupled o utput a mplitude of 300 m v pp se parameter conditions min. typ. max. units input sensitivity for ber <10 -10 , differential input -3.55mvpp input overload for ber <10 -10 , differential input 1200 - - mvpp signal detect programmable range differential inputs (note 3) 10 - 200 mvpp assert and deassert reaction time c rssi = 4.7 nf 2.3 10 s signal detect hysteresis (electrical) signal detect level set to assert level of 15 mvpp (note 1) 2.0 4.5 6.0 db small signal -3db low frequency cut-off excluding ac-coupling capacitors 20 khz pulse width distortion alternating 1-0 pattern at 622 mbps 20 ps tr, tf 400 mv pp differential output amplitude, (ramp set = 0 ? ) (note 2) 65 80 ps 800 mv pp differential output amplitude, (ramp set = 820 ? ) (note 2) 85 100 ps dout 100 dout 100 i o 100 100 v cc 10nf 10nf 50 50 r l r l cx2048 fig. 3
02048-dsh-001-b page 8 of 15 cx02048 low power 3.3 volt limiting amplifier for data rates to 3.3 gbps preliminary information information provided in this data sheet is preliminary and is subject to change without notice. mindspeed technologies?, proprietary and confidential f unctional b lock d iagram f unctional d escription overview the cx02048 is a high-gain limiting amplifier for applications up to 3.3 gbps and incorporates a limiting amplifier, a cml buffer, and an input signal level detection circuit. the cx02048 also features a fully integrated dc- offset cancellation loop that does not require any external components. the user is provided with the flexibility to set the data output amplitude levels and the signal detect level. inputs the data inputs are internally biased to v cc via 50 ? resistors and may be ac or dc-coupled. note that if the inputs are ac-coupled, the coupling capacitor should be of sufficient value to pass the lowest frequencies of interest, bearing in mind the number consecutive identical bits and the input resistance. outputs the basic output configuration is as shown in fig. 5. by controlling the value of i ee via external resistor r ampset , it is possible to set the output voltage swing linearly between 400 mvpp differential and 800 mvpp differential when terminated with the appropriate load. see the applications information for further details. dc offset compensation internal dc feedback requiring no external components is included to remove the effects of dc offsets and act as a dc auto-zero circuit. the circuit is configured such that the feedback is effective only at frequencies below the lowest frequency of interest. the low frequency cut off is less than 20 khz. signal level detector the cx02048 features input signal level detection over an extended range. using an external resistor, (r set ), between pin v set and v cc , the user can program the input signal threshold level. the signal detect status is amp set limiting amplifier cml buffer level detector amplitude control d in 50 50 100 100 d out cmos buffer comparator threshold setting circuit biasing jam i ref st v set st d out d in r ssi v cc a v cc d fig. 4 r out r out r lo ad r lo ad v c c r out = 100 r lo ad = 50 i e e d out d out fig. 5
02048-dsh-001-b page 9 of 15 cx02048 low power 3.3 volt limiting amplifier for data rates to 3.3 gbps preliminary information information provided in this data sheet is preliminary and is subject to change without notice. mindspeed technologies?, proprietary and confidential indicated on the st and st open-drain output pins. the signal detection circuitry has the equivalent of 4.5 db (typical) electrical hysteresis. the curve in fig. 8 gives an indication of the typical value of r set required to set a given signal detect level. see the applications section for further details. jam function signal level detection can be used to automatically force the data outputs to a known state when the input signal falls below the threshold. the function is normally used to allow data to propagate only when the signal is above the user's bit-error-rate requirement. it therefore inhibits the data outputs toggling due to noise when there is no signal present jam. in order to implement this function, st should be connected to the jam pin, thus forcing the data outputs to logical zero when the signal falls below the threshold. note that r set must be connected, even if the level detector function is not required. bias the cx02048 contains an accurate on-chip bias circuit requiring an external 12 k ? 1% resistor, r ref, from pin i ref to ground to define an on-chip reference current. rssi the voltage at rssi (with respect to v cc ) allows the user to monitor the input signal amplitude, see fig. 9. a pplications c ircuit (1) 400 m v pp -d iff 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 r ssi d out v cc v set nc d in iref jam st amp set d out v cc v cc nc d in st 12 k 1% 3k9 1% 10 nf 10 f 50 4.7 nf r f i 10 nf + - 50 ? ? v cc cx02048 m02013 note : r set 3k9 - typ. 50 mvpp assert level fig. 6 note: coupling capacitors are 10 nf f unctional d escription
02048-dsh-001-b page 10 of 15 cx02048 low power 3.3 volt limiting amplifier for data rates to 3.3 gbps preliminary information information provided in this data sheet is preliminary and is subject to change without notice. mindspeed technologies?, proprietary and confidential a pplications c ircuit (2) 800 m v pp - d iff (dc-c oupled o utput o nly ) a pplications i nformation setting output swing level the output circuit is shown in fig 5. it is basically a differential pair with a tail current of i ee . the load of the differential pair is formed by the parallel combination of r out and r load for high frequencies where the coupling capacitor can be considered as a short circuit (100 // 50 = 33.3 ? ). the power consumption in the output stage is given by eq.1: p = i ee x v cc eq.1 the single-ended output voltage swing is given by eq.2: v swing = i ee x (r out // r load ) eq.2 so the power consumption and the voltage swing are related to each other. the required minimum voltage swing sets the i ee and the i ee determines the power consumption. the minimum voltage swing depends on the application. therefore, cx02048 provides the user the flexibility to optimize the voltage swing and the power consumption in his own application by setting i ee using an external resistor (r ampset ). to select the required swing, use the following simple equation (eq.3): i ee = 6 ma + (r ampset x 7.3 x10 -3 ) ma eq.3 in default case, i ee is at minimum and equal to 6 ma which can be set by just connecting amp set pin to ground. so in this case, there is no external resistor needed (r ampset = 0 ? , short-circuit). the resulting voltage swing is 200 mvpp, single-ended (= 6 ma x 33.3 ? ). this is sufficient for most of the applications. if needed the voltage swing can be increased at the expense of the power consumption by connecting an external resistor r ampset between amp set and gnd pins. the value of r ampset can be calculated from eq.3. a resistor of 820 ? results in 12 ma tail current (eq.3) which delivers a voltage swing of 400 mvpp, single-ended (12 ma x 33.3 ? ). (please see note 1 under table 5). setting signal detect level the cx02048 allows the user to set the required signal detect assert level using an external resistor (r set ) to v cc . to select the appropriate value, refer to fig. 8. three example values are given below: t able 7 r esistor v alues 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 r ssi d out v cc v set nc d in iref jam st amp set d out v cc v cc nc d in st 12 k 1% 3k9 1% 10 nf 10 f 50 4.7 nf r f i 10 nf + - 50 v cc cx02048 m02013 note : r set 3k9 - typ. 50 mvpp assert level 820 fig. 7 note: coupling capacitors are 10 nf vin (mv pp) single-ended r set (k ? ) 10 4.6 50 3.9 100 3.65
02048-dsh-001-b page 11 of 15 cx02048 low power 3.3 volt limiting amplifier for data rates to 3.3 gbps preliminary information information provided in this data sheet is preliminary and is subject to change without notice. mindspeed technologies?, proprietary and confidential t ypical s ignal d etect l evel rssi c haracteristics fig. 8 1 10 100 1000 3.5 3.6 3.7 3.8 3.9 4 4.1 4.2 4.3 4.4 4.5 4.6 signal detect assert threshold vs. r set v cc = 3.3 v. temp. = 27c assert threshold level (mv pp diff) r set (k ? ? ? ? ) rssi characteristics - 2.488 gbps 2 23 pattern v cc = 3.3 v, temp = 25 c 0.60 0.65 0.70 0.75 0.80 0.85 0.90 0.95 1.00 1.05 1.10 1 10 100 1000 differential input level (mv pp) v cc - rssi voltage (v) fig. 9
02048-dsh-001-b page 12 of 15 cx02048 low power 3.3 volt limiting amplifier for data rates to 3.3 gbps preliminary information information provided in this data sheet is preliminary and is subject to change without notice. mindspeed technologies?, proprietary and confidential p ackage i nformation 4.00 + 0.10 4.00 + 0.10 top view pin 1 corner 2.50 2.50 3.15 3.15 3.20 3.20 0.80 + 0.10 0.80 + 0.10 bottom view "a" pin 1 corner "c" "b" 0.45 + 0.03 0.45 + 0.03 detail "a" 0.30 + 0.03 0.40 + 0.03 detail "b" (12x) 0.45 + 0.03 0.45 + 0.03 detail "c" (3x) 0.67 + 0.025 0.75 + 0.025 0.80 max thermal performance <50 c/w fig. 10
02048-dsh-001-b page 13 of 15 cx02048 low power 3.3 volt limiting amplifier for data rates to 3.3 gbps preliminary information information provided in this data sheet is preliminary and is subject to change without notice. mindspeed technologies?, proprietary and confidential b are d ie t able 8 p ad c o - ordinates pad reference x (m) y(m) pad reference x (m) y(m) amp set -591.274 418.987 d in 662.726 -175.413 gndd -591.274 278.987 gnda 662.726 -35.413 gndd -591.274 -35.413 gnda 662.726 216.737 d out -590.986 -175.413 v cc a 662.726 356.737 d out -590.986 -315.413 i ref 486.126 614.287 gndd -591.274 -455.413 gnda 346.126 614.287 v cc d -430.224 -599.713 jam 129.776 614.287 v cc a -271.824 -599.713 st -10.224 614.287 gnda -131.824 -599.713 st -150.224 614.287 v set 8.176 -599.713 gnda -290.224 614.287 gnda 662.726 -455.413 r ssi -430.224 614.287 d in 662.726 -315.413 1 2 3 4 5 6 7 8 910 11 12 13 14 15 16 17 18 19 20 21 22 23 amp set gndd d out v cc a gnda v set d in i ref gnda jam st r ssi gndd d out gndd v cc d v cc a gnda d in gnda gnda st gnda fig. 11 die thickness: 275 m 10% die size: 1.535 x 1.535 mm
cx02048 02048-dsh-001-b page 14 of 15 low power 3.3 volt limiting amplifier for data rates to 3.3 gbps preliminary information information provided in this data sheet is preliminary and is subject to change without notice. mindspeed technologies?, proprietary and confidential d isclaimer ? 2003 mindspeed technologies?, as a wholly owned subsidiary and the internet infrastructure business of conexant systems, all rights are reserved. information in this document is provided in connection with mindspeed technologies. "mindspeed" products. these materials are provided by mindspeed as a service to its customers and may be used for informational purposes only. mindspeed assumes no responsibility for errors or omissions in these materials. mindspeed may make changes to specifications and product descriptions at any time, without notice. mindspeed makes no commitment to update the information contained herein. mindspeed shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to its specifications and product descriptions. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. except as provided in mindspeed terms and conditions of sale for such products, mindspeed assumes no liability whatsoever. these materials are provided "as is" without warranty of any kind, either express or implied, relating to sale and/or use of conexant products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. mindspeed further does not warrant the accuracy or completeness of the information, text, graphics or other items contained within these materials. mindspeed shall not be liable for any special, indirect, incidental, or consequential damages, including without limitation, lost revenues or lost profits, which may result from the use of these materials. mindspeed products are not intended for use in medical, life saving or life sustaining applications. mindspeed customers using or selling mindspeed products for use in such applications do so at their own risk and agree to fully indemnify mindspeed for any damages resulting from such improper use or sale. the following are trademarks of mindspeed technologies,. the symbol m1, mindspeed?, and "build it first?" product names or services listed in this publication are for identification purposes only, and may be trademarks of third parties. third-party brands and names are the property of their respective owners. reader response: mindspeed technologies, strives to produce quality documentation and welcomes your feedback. please send comments and suggestions to mailto:tech.pubs@mindspeed.com. for technical questions, or to talk to a field applications engineer contact your local mindspeed? sales office listed below. for literature send email request to literature@mindspeed.com.
02048-dsh-001-b page 15 of 15 headquarters newport beach mindspeed technologies 4000 macarthur boulevard, east tower newport beach, ca 92660 phone: (949) 579-3000 fax: (949) 579-3020 www.mindspeed.com contact information information provided in this data sheet is preliminary and is subject to change without notice. mindspeed technologies?, proprietary and confidential

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