dual-channel, 14-bit ccd signal processor and precision timing core ad9990 rev. spb information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2007C2010 analog devices, inc. all rights reserved. features 1.8 v afetg core internal ldo regulators 24 programmable vertical clock signals correlated double sampler (cds) with ?3 db, 0 db, +3 db, and +6 db gain 6 db to 42 db, 10-bit variable gain amplifier (vga) 14-bit, 32 mhz analog-to-digital converter (adc) black level clamp with variable level control complete on-chip timing generator precision timing core with ~488 ps resolution on-chip 3 v horizontal and rg drivers general-purpose outputs (gpos) for shutter and system support on-chip driver for external crystal on-chip sync generator with external sync input 112-ball csp_bga package, 8 mm 8 mm, 0.65 mm pitch applications digital still cameras general description the ad9990 is a highly integrated ccd signal processor for digital still camera applications. it includes a complete analog front end with analog-to-digital conversion and a full-function, programmable timing generator for a 2-channel output ccd. each channel is specified up to 32 mhz. the timing generator is capable of supporting up to 24 vertical clock signals to control advanced ccds. a precision timing ? core allows adjustment of high speed clocks with ~488 ps resolution at 32 mhz operation. the ad9990 also contains eight general-purpose outputs that can be used for shutter and system functions. each analog front end includes black level clamping, a cds, a vga, and a 14-bit adc. the timing generator provides all the necessary ccd clocks: rg, h-clocks, v-clocks, sensor gate pulses, substrate clock, and substrate bias control. the ad9990 is specified over an operating temperature range of ?25c to +85c. for more information about the ad9990, contact analog devices via email at afe.ccd@analog.com . functional block diagram cds vga clamp 14-bit adc sl sck sdata cli vref_b 6db to 42db horizontal drivers vertical timing control rg_a, rg_b h1a to h4a, h1b to h4b 24 reft_b refb_b precision timing generator sync generator internal clocks hd vd sync internal registers ccdin_a ?3db, 0db, +3db, +6db 14 hl_a, hl_b clo gpo1 to gpo8 xv1 to xv24 1.8v output 3v input 8 8 ldo reg_b 1.8v output 3v input ldo reg_a subck rst cds vga clamp 14-bit adc 6db to 42db ccdin_b ?3db, 0db, +3db, +6db 14 vref_a reft_ a refb_ a 2 2 data output mux dout 14 ad9990 0 6894-001 dclk figure 1.
ad9990 rev. spb | page 2 of 2 notes ?2007C2010 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. d06894f-0-6/10(spb)
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