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3 v, voltage monitoring microprocessor supervisory circuits data sheet adm706p / adm706r / adm706s/ adm706t, adm708r / adm708s/ adm708t rev. d document feedback information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 ?1995C2014 analog devices, inc. all rights reserved. technical support www.analog.com features precision supply voltage monitor 2.63 v ( adm706p , adm706r , adm708r ) 2.93 v ( adm706s , adm708s ) 3.08 v ( adm706t , adm708t ) 100 a quiescent current 200 ms reset pulse width debounced manual reset input ( mr ) independent watchdog timer 1.6 second timeout (adm706x) reset output active high ( adm706p ) active low ( adm706r , adm706s , adm706t ) both active high and active low ( adm708r , adm708s , adm708t ) voltage monitor for power-fail or low battery warning guaranteed reset valid with v cc = 1 v superior upgrade for max706p/r/s/t, max708r/s/t applications microprocessor systems computers controllers intelligent instruments critical microprocessor monitoring battery-operated systems portable instruments functional block diagrams watchdog transition detector watchdog input (wdi) power-fail input (pfi) power-fail output (pfo) watchdog output (wdo) reset, (p = reset) * voltage reference = 2.63v (p/r), 2.93v (s), 3.08v (t) adm706p/adm706r/ adm706s/adm706t reset and watchdog timebase reset generator mr v cc 70 a v cc watchdog timer v ref * 1.25v 06435-001 figure 1. adm706p / adm706r / adm706s / adm706t 1.25v power-fail input (pfi) reset * voltage reference = 2.63v (r), 2.93v (s), 3.08v (t) reset generator mr v cc 70 a v cc reset 06435-002 v ref * power-fail output (pfo) adm708r/adm708s/ adm708t figure 2. adm708r / adm708s / adm708t general description the adm706p / adm706r / adm706s / adm706t and the adm708r / adm708s / adm708t microprocessor supervisory circuits are suitable for monitoring either 3 v or 3.3 v power supplies. the adm706p / adm706r / adm706s / adm706t provide power-supply monitoring circuitry that generate a reset output during power-up, power-down, and brownout conditions. the reset output remains operational with v cc as low as 1 v. independent watchdog monitoring circuitry is also provided. this is activated if the watchdog input has not been toggled within 1.6 seconds. in addition, there is a 1.25 v threshold detector for power-fail warning, low battery detection, or to monitor an additional power supply. an active low debounced mr input is also included. the adm706r , adm706s , and adm706t are identical except for the reset threshold monitor levels, which are 2.63 v, 2.93 v, and 3.08 v, respectively. the adm706p is identical to the adm706r in that the reset threshold is 2.63 v. it differs only in that it has an active high reset output. the adm708r / adm708s / adm708t provide similar functio- nality as the adm706r / adm706s / adm706t and only differ in that a watchdog timer function is not available. instead, an active high reset output (reset) is provided in addition to the active low ( reset ) output. all parts are available in narrow 8-lead pdip and 8-lead soic packages.
adm706p/adm706r/adm706s/adm706 t, adm708r/adm708s/adm708t data sheet rev. d | page 2 of 16 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 functional block diagrams ............................................................. 1 general description ......................................................................... 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 absolute maximum ratings ............................................................ 5 esd caution .................................................................................. 5 pin configurations and function descriptions ........................... 6 typical performance characteristics ............................................. 8 circuit information ........................................................................ 10 power-fail reset ......................................................................... 10 manual reset ............................................................................... 10 watchdog timer (adm706x) .................................................. 10 power-fail comparator ............................................................. 11 adding hysteresis to the power-fail comparator ................. 11 va l i d reset below 1 v v cc ..................................................... 11 applications information .............................................................. 12 monitoring additional supply levels ...................................... 12 microprocessors with bidirectional reset ........................... 12 outline dimensions ....................................................................... 13 ordering guide .......................................................................... 14 revision history 10/14rev. c to rev. d changes to pin 4 description; table 3 ........................................... 6 changes to pin 4 description; table 4 ........................................... 7 changes to ordering guide .......................................................... 14 5/08rev. b to rev. c changes to applications section .................................................... 1 changes to table 2 ............................................................................ 5 changes to table 3 ............................................................................ 6 changes to figure 8 .......................................................................... 7 changes to figure 16 ........................................................................ 9 2/07rev. a to rev. b updated format .................................................................. universal changes to table 1 ............................................................................ 3 updated outline dimensions ....................................................... 12 changes to ordering guide .......................................................... 13 data sheet adm706p/adm706r/adm706s/adm7 06t, adm708r/adm708s/adm708t rev. d | page 3 of 16 specifications v cc = 2.70 v to 5.5 v ( adm706p /adm70xr), v cc = 3.00 v to 5.5 v (adm70xs), v cc = 3.15 v to 5.5 v (adm70xt), t a = t min to t max unless otherwise noted. table 1. parameter min typ max unit test conditions/comments power supply v cc operating voltage range 1.0 5.5 v supply current 100 200 a v cc < 3.6 v 150 350 a v cc < 5.5 v logic output reset threshold (v rst ) 2.55 2.63 2.70 v adm706p /adm70xr 2.85 2.93 3.00 v adm70xs 3.00 3.08 3.15 v adm70xt reset threshold hysteresis 20 mv reset pulse width 160 200 280 ms adm706p /adm70xr, v cc = 3 v 160 200 280 ms adm70xs/adm70xt, v cc = 3.3 v 200 ms v cc = 5.0 v reset output voltage (adm70xr/adm70xs/adm70xt) v oh 0.8 v cc v v rst (max) < v cc < 3.6 v, i source = 500 a v ol 0.3 v v rst (max) < v cc < 3.6 v, i sink = 1.2 ma v oh v cc ? 1.5 v v 4.5 v < v cc < 5.5 v, i source = 800 a v ol 0.4 v 4.5 v < v cc < 5.5 v, i sink = 3.2 ma v ol 0.3 v v cc = 1 v, i sink = 100 a reset output voltage ( adm706p ) v oh v cc ? 0.6 v v v rst (max) < v cc < 3.6 v, i source = 215 a v ol 0.3 v v rst (max) < v cc < 3.6 v, i sink = 1.2 ma v oh v cc ? 1.5 v v 4.5 v < v cc < 5.5 v, i source = 800 a v ol 0.4 v 4.5 v < v cc < 5.5 v, i sink = 3.2 ma reset output voltage (adm708x) v oh 0.8 v cc v v rst (max) < v cc < 3.6 v, i source = 500 a v ol 0.3 v v rst (max) < v cc < 3.6 v, i sink = 500 a v oh v cc ? 1.5 v v 4.5 v < v cc < 5.5 v, i source = 800 a v ol 0.4 v 4.5 v < v cc < 5.5 v, i sink = 1.2 ma watchdog input (adm706x) watchdog timeout period 1.00 1.60 2.25 sec adm706p / adm706r : v cc = 3 v; adm706s/ adm706t : v cc = 3.3 v; v il = 0.4 v, v ih = v cc 0.8 v wdi pulse width 100 ns v rst (max) < v cc < 3.6 v 50 ns 4.5 v < v cc < 5.5 v wdi input threshold v il 0.6 v v rst (max) < v cc < 3.6 v v ih 0.7 v cc v v rst (max) < v cc < 3.6 v v il 0.8 v v cc = 5.0 v v ih 3.5 v v cc = 5.0 v wdi input current ?1.0 +0.02 +1.0 a wdi = 0 v or v cc wdo output voltage v oh 0.8 v cc v v rst (max) < v cc < 3.6 v, i source = 500 a v cc ? 1.5 v v 4.5 v < v cc < 5.5 v, i source = 800 a v ol 0.3 v v rst (max) < v cc < 3.6 v, i sink = 500 a 0.4 v 4.5 v < v cc < 5.5 v, i sink = 1.2 ma adm706p/adm706r/adm706s/adm706 t, adm708r/adm708s/adm708t data sheet rev. d | page 4 of 16 parameter min typ max unit test conditions/comments manual reset input mr pull-up current (mr = 0 v) 25 70 250 a v rst (max) < v cc < 3.6 v 100 250 600 a 4.5 v < v cc < 5.5 v mr pulse width 500 ns v rst (max) < v cc < 3.6 v 150 ns 4.5 v < v cc < 5.5 v mr input threshold v il 0.6 v v rst (max) < v cc < 3.6 v v ih 0.7 v cc v v rst (max) < v cc < 3.6 v v il 0.8 v 4.5 v < v cc < 5.5 v v ih 2.0 v 4.5 v < v cc < 5.5 v mr to reset output delay 750 ns v rst (max) < v cc < 3.6 v 250 ns 4.5 v < v cc < 5.5 v power-fail input pfi input threshold 1.2 1.25 1.3 v adm70xp/adm70xr, v cc = 3 v adm70xs/adm70xt, v cc = 3.3 v, pfi falling pfi input current ?25 +0.01 +25 na pfo output voltage v oh 0.8 v cc v v rst (max) < v cc < 3.6 v, i source = 500 a v ol 0.3 v v rst (max) < v cc < 3.6 v, i sink = 1.2 ma v oh v cc ? 1.5 v v 4.5 v < v cc < 5.5 v, i source = 800 a v ol 0.4 v 4.5 v < v cc < 5.5 v, i sink = 3.2 ma data sheet adm706p/adm706r/adm706s/adm7 06t, adm708r/adm708s/adm708t rev. d | page 5 of 16 absolute maximum ratings t a = 25c unless otherwise noted. table 2. parameter rating v cc ?0.3 v to +6 v all other inputs ?0.3 v to v cc + 0.3 v input current v cc 20 ma gnd 20 ma digital output current 20 ma power dissipation, n-8 (pdip) 727 mw ja thermal impedance 135c/w power dissipation, r-8 (soic) 470 mw ja thermal impedance 110c/w operating temperature range industrial (version a) ?40c to +85c lead temperature (soldering, 10 sec) 300c vapor phase (60 sec) 215c infrared (15 sec) 220c storage temperature range ?65c to +150c esd rating >4.5 kv stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. esd caution adm706p/adm706r/adm706s/adm706 t, adm708r/adm708s/adm708t data sheet rev. d | page 6 of 16 pin configurations and function descriptions reset adm706p top view (not to scale) 1 2 3 4 5 8 7 6 06435-003 mr pfo wdi wdo v cc g nd pfi reset top view (not to scale) 1 2 3 4 5 8 7 6 06435-004 mr pfo wdi v cc g nd pfi wdo adm706r/ adm706s/ adm706t figure 3. adm706p figure 4. adm706r / adm706s / adm706t table 3. pin function descriptions adm706p / adm706r / adm706s / adm706t pin no. mnemonic description 1 mr manual reset input. when taken below 0.6 v, a reset/reset is generated. mr can be driven from ttl, cmos logic, or from a manual reset switch because it is internally debounced. an internal 70 a pull-up current hold s the input high when floating. 2 v cc power supply input. 3 gnd ground. ground reference for all signals (0 v). 4 pfi power-fail input. pfi is the noninverting input to the power-fail comparator. when pfi is less than 1.25 v, pfo goes low. if unused, pfi should be connected to v cc . 5 pfo power-fail output. pfo is the output from the power-fail co mparator. it goes low when pfi is less than 1.25 v. 6 wdi watchdog input. if wdi remains either high or low for longer than the watchdog timeout period, the watchdog output, wdo , goes low. the timer resets wi th each transition at the wdi input. either a high-to-low or a low-to-high transi tion clears the counter. the internal timer is also cleared whenever reset is asserted. 7 ( adm706r / adm706s / adm706t only) reset logic output. reset goes low for 200 ms when triggere d. it is triggered either by v cc being below the reset threshold or by a low signal on the mr input. reset remains low whenever v cc is below the reset threshold. it remains low for 200 ms after v cc goes above the reset threshold or mr goes from low to high. a watchd og timeout does not trigger reset unless wdo is connected to mr . 7 ( adm706p only) reset logic output. reset is an active high output su itable for systems that use active high reset logic. it is the inverse of reset . 8 wdo watchdog output. wdo goes low if the internal watchdog timer times out as a result of inactivity on the wdi input. it remains lo w until the watchdog timer is cleared. wdo also goes low during low line conditions. whenever v cc is below the reset threshold, wdo remains low. as soon as v cc goes above the reset threshold, wdo goes high immediately. data sheet adm706p/adm706r/adm706s/adm7 06t, adm708r/adm708s/adm708t rev. d | page 7 of 16 reset top view (not to scale) 1 2 3 4 5 8 7 6 06435-005 mr pfo nc v cc g nd pfi nc = no connect reset adm708r/ adm708s/ adm708t figure 5. adm708r / adm708s / adm708t table 4. pin function descriptions adm708r / adm708s / adm708t pin no. mnemonic description 1 mr manual reset input. when taken below 0.6 v, a reset/reset is generated. mr can be driven from ttl, cmos logic, or from a manual reset switch because it is inte rnally debounced. an internal 70 a pull-up current holds the input high when floating. 2 v cc power supply input. 3 gnd ground. ground reference for all signals (0 v). 4 pfi power-fail input. pfi is the noninver ting input to the power-fail comparator. when pfi is less than 1.25 v, pfo goes low. if unused, pfi should be connected to v cc . if unused, pfi should be connected to v cc . 5 pfo power-fail output. pfo is the output from the power- fail comparator. it goes low when pfi is less than 1.25 v. 6 nc no connect. 7 reset logic output. reset goes low for 200 ms when triggere d. it is triggered either by v cc being below the reset threshold or by a low signal on the mr input. reset remains low whenever v cc is below the reset threshold. it remains low for 200 ms after v cc goes above the reset threshold or mr goes from low to high. a watchdog timeout does not trigger reset unless wdo is connected to mr . 8 reset logic output. reset is an active high output suitable fo r systems that use active high reset logic. it is the inverse of reset . adm706p/adm706r/adm706s/adm706 t, adm708r/adm708s/adm708t data sheet rev. d | page 8 of 16 typical performance characteristics 06435-013 reset v cc 400ms/div figure 6. adm70xr/adm70xs/adm70xt reset output voltage vs. supply voltage 06435-014 reset v cc 400ms/div figure 7. reset output voltage vs. supply voltage 06435-015 3v 1.2v 0v 1.3v pfi 500ns/div v cc = 3.3v t a = 25c pfo figure 8. pfi assertion response time 06435-016 0v 1.3v pfi 3v 1.2v 500ns/div v cc = 3.3v t a = 25c pfo figure 9. pfi deassertion response time 06435-017 0 v 0v 3v 3 v 100ns/div v cc = v rt t a = 25c reset reset figure 10. reset , reset assertion 06435-018 0 v 0v 3v 3 v 100ns/div v cc = v rt t a = 25c reset reset figure 11. reset , reset deassertion data sheet adm706p/adm706r/adm706s/adm7 06t, adm708r/adm708s/adm708t rev. d | page 9 of 16 06435-019 0v 2v 3v 3v 2s/div t a = 25c reset v cc figure 12. adm70xr/adm70xs/adm70xt reset response time adm706p/adm706r/adm706s/adm706 t, adm708r/adm708s/adm708t data sheet rev. d | page 10 of 16 circuit information watchdog transition detector watchdog input (wdi) power-fail input (pfi) power-fail output (pfo) watchdog output (wdo) reset, (p = reset) * voltage reference = 2.63v (p/r), 2.93v (s), 3.08v (t) reset and watchdog timebase reset generator mr v cc 70 a v cc watchdog timer v ref * 1.25v 06435-006 adm706p/adm706r/ adm706s/adm706t figure 13. adm706 functional block diagram 1.25v power-fail input (pfi) reset * voltage reference = 2.63v (r), 2.93v (s), 3.08v (t) reset generator mr v cc 70 a v cc reset 06435-007 v ref * power-fail output (pfo) adm708r/adm708s/ adm708t figure 14. adm708 functional block diagram power-fail reset the reset output provides a reset (reset or reset ) output signal to the microprocessor whenever the v cc input is below the reset threshold. the actual reset threshold voltage is dependent on whether a p, r, s, or t suffix device is used. an internal timer holds the reset output active for 200 ms after the voltage on v cc rises above the threshold. this is intended as a power-on reset signal for the microprocessor. it allows time for both the power supply and the microprocessor to stabilize after power-up. if a power supply brownout or interruption occurs, the reset line is similarly activated and remains active for 200 ms after the supply recovers. if another interruption occurs during an active reset period, the reset timeout period continues for an additional 200 ms. the reset output is guaranteed to remain valid with v cc as low as 1 v. this ensures that the microprocessor is held in a stable shutdown condition as the power supply starts up. the adm706p provides an active high reset signal; the adm706r / adm706s / adm706t provide an active low reset signal; and the adm708r / adm706s / adm706t provide both reset and reset . manual reset the mr input allows other reset sources, such as a manual reset switch, to generate a processor reset. the input is effectively debounced by the timeout period (200 ms typical). the mr input is ttl-/cmos-compatible; it can also be driven by any logic reset output. if unused, the mr input can be tied high or left floating. v cc reset mr wdo v rt mr externally driven low 06435-008 v rt t rs t rs notes reset = complement of reset figure 15. reset , mr , and wdo timing watchdog timer (adm706x) the watchdog timer circuit is used to monitor the activity of the microprocessor to check that it is not stalled in an indefinite loop. an output line on the processor is used to toggle the watchdog input (wdi) line. if this line is not toggled within the timeout period (1.6 seconds), the watchdog output ( wdo ) is driven low. the wdo output is connected to a nonmaskable interrupt (nmi) on the processor. therefore, if the watchdog timer times out, an interrupt is generated. the interrupt service routine is used to rectify the problem. the watchdog timer is cleared either by a high-to-low or by a low-to-high transition on wdi. pulses as narrow as 50 ns are detected. the timer is also cleared by reset/ reset going active. therefore, the watchdog timeout period begins after reset goes inactive. when v cc falls below the reset threshold, wdo is forced low whether or not the watchdog timer has timed out. normally, this generates an interrupt, but it is overridden by reset/ reset going active. t wp wdi wdo reset t rs reset externally triggered by mr t wd t wd t wd 06435-009 figure 16. watchdog timing data sheet adm706p/adm706r/adm706s/adm7 06t, adm708r/adm708s/adm708t rev. d | page 11 of 16 power-fail comparator the power-fail comparator is an independent comparator that can be used to monitor the input power supply. the inverting input of the comparator is internally connected to a 1.25 v reference voltage. the noninverting input is available at the pfi input. this input is used to monitor the input power supply via a resistive divider network. when the voltage on the pfi input drops below 1.25 v, the comparator output ( pfo ) goes low, indicating a power failure. for early warning of power failure, the comparator is used to monitor the preregulator input simply by choosing an appropriate resistive divider network. the pfo output is used to interrupt the processor so that a shutdown procedure is implemented before the power is lost. input powe r r1 r2 power-fail input 1.25v pfi pfo power-fail output 06435-010 adm706p/adm706r/ adm706s/adm706t/ adm708r/adm708s/ adm708t figure 17. power-fail comparator adding hysteresis to the power-fail comparator for increased noise immunity, hysteresis can be added to the power-fail comparator. because the comparator circuit is noninverting, hysteresis is added simply by connecting a resistor between the pfo output and the pfi input as shown in figure 18. when pfo is low, resistor r3 sinks current from the summing junction at the pfi pin. when pfo is high, resistor r3 sources current into the pfi summing junction. this results in differing trip levels for the comparator. further noise immunity is achieved by connecting a capacitor between pfi and gnd. 0 6435-011 input power to microprocessor nmi r3 3.3v v cc r1 r2 1.25v pfi pfo adm663a 3.3v 0v 0v v l v in v h ? + pfo adm706p/adm706r/ adm706s/adm706t/ adm708r/adm708s/ adm708t figure 18. adding hysteresis to the power-fail comparator ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?? r1 r3r2 r3r2 v h 125.1 ? ? ? ? ? ? ? ??? r3 v r2 r1 v cc l 25.1 25.1 25.1 ? ? ? ? ? ? ? ? r2 r2r1 v mid 25.1 valid reset below 1 v v cc the adm706r / adm706s / adm706t , adm708r / adm708s / adm708t are guaranteed to provide a valid reset level with v cc as low as 1 v. refer to the typical performance characteristics section. as v cc drops below 1 v, the internal transistor does not have sufficient drive to hold it on so the voltage on reset is no longer held at 0 v. a pull-down resistor, as shown in figure 19, can be connected externally to hold the line low if it is required. gnd reset r1 06435-012 adm706r/adm706s/ adm706t/adm708r/ adm708s/adm708t figure 19. reset valid below 1 v adm706p/adm706r/adm706s/adm706 t, adm708r/adm708s/adm708t data sheet rev. d | page 12 of 16 applications information a typical operating circuit is shown in figure 20. the unregulated dc input supply is monitored using the pfi input via the resistive divider network. resistor r1 and resistor r2 are to be selected so that when the supply voltage drops below the desired level (for example, 5 v), the voltage on pfi drops below the 1.25 v threshold, thereby generating an interrupt to the microprocessor. monitoring the preregulator input gives additional time to execute an orderly shutdown procedure before power is lost. 06435-020 reset gnd mr pfi wdi pfo reset v cc 3.3v wdo v cc i/o line interrupt nmi manual reset gnd gnd in out adm666a microprocessor adm706r/ adm706s/ adm706t unregulated dc figure 20. typical application circuit microprocessor activity is monitored using the wdi input. this is driven using an output line from the processor. the software routines toggle this line at least once every 1.6 seconds. if a problem occurs and this line is not toggled, wdo goes low and a nonmask- able interrupt is generated. this interrupt routine is to be used to clear the problem. if, in the event of inactivity on the wdi line, a system reset is required, the wdo output is to be connected to the input as shown in figure 21. 0 6435-021 reset gnd i/o line mr pfi wdi wdo reset microprocessor adm706r/ adm706s/ adm706t figure 21. reset from wdo monitoring additional supply levels it is possible to use the power-fail comparator to monitor a second supply as shown in figure 22. the two sensing resistors, r1 and r2, are selected such that the voltage on pfi drops below 1.25 v at the minimum acceptable input supply. the pfo output can be connected to the mr input so that a reset is generated when the supply drops out of tolerance. in this case, if either supply drops out of tolerance, a reset is generated. 06435-022 reset gnd mr pfi wdi pfo reset v cc r1 r2 v x +3v/+3.3 v adm706r/ adm706s/ adm706t microprocessor figure 22. monitoring 3 v/3.3 v and an additional supply, v x microprocessors with bidirectional reset to prevent contention for microprocessors with a bidirectional reset line, a current limiting resistor is to be inserted between the adm706r / adm706s / adm706t , adm708r / adm708s / adm708t reset output pin and the microprocessor reset pin. this limits the current to a safe level if there are conflicting output reset levels. a suitable resistor value is 4.7 k. if the reset output is required for other uses, it should be buffered as shown in figure 23. 06435-023 reset gnd reset gnd buffered reset +3v/+3.3v v cc adm706r/adm706s/ adm706t/adm708r/ adm708s/adm708t microprocessor figure 23. bidirectional input/output reset data sheet adm706p/adm706r/adm706s/adm7 06t, adm708r/adm708s/adm708t rev. d | page 13 of 16 outline dimensions compliant to jedec standards ms-001 controlling dimensions are in inches; millimeter dimensions (in parentheses) are rounded-off inch equivalents for reference only and are not appropriate for use in design. corner leads may be configured as whole or half leads. 070606-a 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) seating plane 0.015 (0.38) min 0.210 (5.33) max 0.150 (3.81) 0.130 (3.30) 0.115 (2.92) 0.070 (1.78) 0.060 (1.52) 0.045 (1.14) 8 1 4 5 0.280 (7.11) 0.250 (6.35) 0.240 (6.10) 0.100 (2.54) bsc 0.400 (10.16) 0.365 (9.27) 0.355 (9.02) 0.060 (1.52) max 0.430 (10.92) max 0.014 (0.36) 0.010 (0.25) 0.008 (0.20) 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.195 (4.95) 0.130 (3.30) 0.115 (2.92) 0.015 (0.38) gauge plane 0.005 (0.13) min figure 24. 8-lead plastic dual in-line package [pdip] narrow body (n-8) dimension shown in inches and (millimeters) controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design. compliant to jedec standards ms-012-aa 012407-a 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) 0.50 (0.0196) 0.25 (0.0099) 45 8 0 1.75 (0.0688) 1.35 (0.0532) seating plane 0.25 (0.0098) 0.10 (0.0040) 4 1 85 5.00 (0.1968) 4.80 (0.1890) 4.00 (0.1574) 3.80 (0.1497) 1.27 (0.0500) bsc 6.20 (0.2441) 5.80 (0.2284) 0.51 (0.0201) 0.31 (0.0122) coplanarity 0.10 figure 25. 8-lead standard small outline package [soic_n] narrow body (r-8) dimensions shown in millimeters and (inches) adm706p/adm706r/adm706s/adm706 t, adm708r/adm708s/adm708t data sheet rev. d | page 14 of 16 ordering guide model 1 temperature range package description package option adm706anz ?40c to +85c 8-lead pdip n-8 adm706ar ?40c to +85c 8-lead soic_n r-8 adm706ar-reel ?40c to +85c 8-lead soic_n r-8 adm706ar-reel7 ?40c to +85c 8-lead soic_n r-8 adm706arz ?40c to +85c 8-lead soic_n r-8 adm706arz-reel ?40c to +85c 8-lead soic_n r-8 adm706arz-reel7 ?40c to +85c 8-lead soic_n r-8 adm706panz ?40c to +85c 8-lead pdip n-8 adm706parz ?40c to +85c 8-lead soic_n r-8 adm706parz-reel ?40c to +85c 8-lead soic_n r-8 adm706ranz ?40c to +85c 8-lead pdip n-8 adm706rar ?40c to +85c 8-lead soic_n r-8 adm706rarz ?40c to +85c 8-lead soic_n r-8 adm706rarz-reel ?40c to +85c 8-lead soic_n r-8 adm706rarz-reel7 ?40c to +85c 8-lead soic_n r-8 adm706sanz ?40c to +85c 8-lead pdip n-8 adm706sar ?40c to +85c 8-lead soic_n r-8 adm706sar-reel ?40c to +85c 8-lead soic_n r-8 adm706sarz ?40c to +85c 8-lead soic_n r-8 adm706sarz-reel ?40c to +85c 8-lead soic_n r-8 adm706tanz ?40c to +85c 8-lead pdip n-8 adm706tar ?40c to +85c 8-lead soic_n r-8 adm706tar-reel ?40c to +85c 8-lead soic_n r-8 adm706tarz ?40c to +85c 8-lead soic_n r-8 adm706tarz-reel ?40c to +85c 8-lead soic_n r-8 adm708anz ?40c to +85c 8-lead pdip n-8 adm708ar ?40c to +85c 8-lead soic_n r-8 adm708ar-reel ?40c to +85c 8-lead soic_n r-8 adm708armz ?40c to +85c 8-lead soic_n r-8 adm708armz-reel ?40c to +85c 8-lead soic_n r-8 adm708ranz ?40c to +85c 8-lead pdip n-8 adm708rar ?40c to +85c 8-lead soic_n r-8 adm708rar-reel ?40c to +85c 8-lead soic_n r-8 adm708rarz ?40c to +85c 8-lead soic_n r-8 adm708rarz-reel ?40c to +85c 8-lead soic_n r-8 adm708sanz ?40c to +85c 8-lead pdip n-8 adm708sar ?40c to +85c 8-lead soic_n r-8 adm708sar-reel ?40c to +85c 8-lead soic_n r-8 adm708sarz ?40c to +85c 8-lead soic_n r-8 adm708sarz-reel ?40c to +85c 8-lead soic_n r-8 adm708tanz ?40c to +85c 8-lead pdip n-8 adm708tar ?40c to +85c 8-lead soic_n r-8 adm708tarz ?40c to +85c 8-lead soic_n r-8 adm708tarz-reel ?40c to +85c 8-lead soic_n r-8 1 z = rohs compliant part. data sheet adm706p/adm706r/adm706s/adm7 06t, adm708r/adm708s/adm708t rev. d | page 15 of 16 notes adm706p/adm706r/adm706s/adm706 t, adm708r/adm708s/adm708t data sheet rev. d | page 16 of 16 notes ?1995C2014 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. d00089-0-10/14(d) |
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