91212hk/82912hkpc 20111107-s00001 no.a2118-1/5 http://onsemi.com semiconductor components industries, llc, 2013 june, 2013 * i 2 c bus is a trademark of philips corporation. LC898212XA overview the af control device, LC898212XA (LC898212XA-mh), pr ovides an ideal way to implement the reduced power consumption and the improved autofocus precision and speed (reduced convergence time) required in high-pixel- count camera modules for use in smartphones. the LC898212XA integrates on a single chip an equalizer circuit employing digital calculation, and it can be combined with position sensors to build a closed-loop actuator control system. since closed-loop control provides better ability to maintain the control object than conventional open-loop systems and is not affected by position differences, the LC898212XA is ideal for use in af systems us ed in a wide variety of cameras. a closed-loop system uses position sensors for position control, and power consum ption is lower than with conventional open-loop control, which uses current values for position control. in addition, a new pwm drive system employed suppresses noise that could affect image quality while achieving reduced power consumption, making this ic ideal for use in mobile devices such as smartphones. the filter coefficients of the equalizer circuit can be adjusted to any values desired by making register settings via i 2 c communication. this makes it possible to build a control circuit optimized to the various types of actuators and thereby achieve faster autofocus (re duced convergence time) performance. the integrated adc provides up to 10 -bit precision for highly accurate af pos ition control. also integrated on-chip are a constant current supply dac for drive and an op-amp with adjustable gain for use with the position sensors indispensable for building a closed-loop control system. ordering number : ena2118a cmos lsi af control lsi
LC898212XA no.a2118-2/5 features ? built-in equalizer circuit using digital operation af control equalize circuit any coefficient can be specified by i 2 c i/f ? i 2 c interface ? built-in a/d converter maximum 10-bit input 2 channel ? built-in d/a converter 8-bit output 2-channel (hall offset, constant current bias) ? built-in op amp 1 channel hall amp ? built-in osc 48mhz (frequency adjustment function) ? built-in pwm pulse generator circuit pwm circuit for af control ? 1-chip motor driver saturation drive h bridge 1 channel ? package wl-csp 12-pin lead-free, halogen-free ? supply voltage logic unit: internal core typ 1.2v (1.08v to 1.32v), av dd (2.6v to 3.6v) driver unit: vm (2.6v to 3.6v) package dimensions unit : mm (typ) 3440 sanyo : wlp12(1.77x1.37) top view side view side view bottom view 0.26 1.77 1.37 cba 0.285 0.4 0.285 0.4 1234 0.69 max 0.21 (0.43)
LC898212XA no.a2118-3/5 block diagram out1 out2 ad eq output control logic hbridge driver biaso opinp opinm da v dd vm pgnd pwm modulation v ss osc por reg av dd av dd v ddo hall i2cdt i2cck i 2 c i/f
LC898212XA no.a2118-4/5 pin description type i input p power supply, gnd nc not connect o output b bidirection i 2 c interface i2cck b i 2 c clock pin i2cdt b i 2 c data pin d/a interface biaso o d/a output (hall bias input) op-amp interface opinp i op-amp input opinm i op-amp input driver interface out1 o actuator output pin out2 o actuator output pin power supply pin v dd p digital power supply v ss p digital gnd v ddo p ldo power supply out vm p motor power supply pgnd p power gnd pin type ?o? ? ensure that it is set to open. pin type ?i? ? open is inhibited. en sure that it is connected to the v dd or v ss even when it is unused. (please contact our company for more information about selection of v dd or v ss .) pin type ?b? ? if you are unsure about processing method on the pin description of pin layout table, please contact us. note that incorrect processing of unused pins may result in defects. if you have any question, please feel free to contact us. pin layout circuit name number of pins circuit name number of pins analog 4 driver 4 logic 4 backside pin layout diagram (top view from the mold side) 4 v ddo vm pgnd 3 av dd i2cdt out1 2 opinp i2cck out2 1 v ss opinm biaso a b c
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