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| 2g / 4g / 6g / 8g tri - axis digital accelerometer specifications part number: kxcnl - 1010 rev 3 .0 36 thornwood dr. C ithaca, ny 14850 tel: 607 - 257 - 1080 C fax:607 - 257 - 1146 www.kionix.com - info@kionix.com ? 2013 kionix C all rights reserved 1.0 page 1 of 51 product description the kxcnl - 101 0 is a tri - axis +/ - 2g, +/ - 4g , +/ - 6g, or +/ - 8g silicon micromachined accelerometer with integrated programmable state machines . the sense element is fabricated using kionixs proprietary plasma micromachining process technology. acceleration sensing is based on the principle of a differential capacitance arising from acceleration - induced motion of the sense element, which further utilizes common mode cancellation to decrease errors from process variation, temperature, and environmental stress. the sense element is hermetically sealed at the wafer level by bonding a second silicon lid wafer to the device using a glass frit. a separ ate asic device packaged with the sense element provides signal conditioning, and intelligent user - programmable state machines . the accelerometer is delivered in a 3 x 3 x 0.9 mm lga plastic package operating from a 1.8 C 3.6v dc supply. i 2 c interface is used to communicate to the chip to load state programs, configure settings, and check updates to the acceleration data . functional diagram
2g / 4g / 6g / 8g tri - axis digital accelerometer specifications part number: kxcnl - 1010 rev 3 .0 36 thornwood dr. C ithaca, ny 14850 tel: 607 - 257 - 1080 C fax:607 - 257 - 1146 www.kionix.com - info@kionix.com ? 2013 kionix C all rights reserved 1.0 page 2 of 51 product specifications table 1. mechanical (specifications are for 12 - bit operation at 2.5 v and t = 25c unless stated otherwise) parameters units min typical max operating temperature range o c - 4 0 - 85 zero - g offset mg 25 zero - g offset variation from rt over temp. mg/ o c 0. 5 (xy), 0.8 (z) sensitivity 1 sc_1=0, sc_0=0 ( 2g) counts/g 1024 sc_1=0, sc_0=1 ( 4g) 512 sc_1=1, sc_0=0 ( 6 g) 341 sc_1=1, sc_0=1 ( 8g) 256 sensitivity variation from rt over temp. %/ o c 0.01 self test output change on activation g 0.5 (x) 0.7 (y) 0.7 (z) mechanical resonance ( - 3db) 2 hz 3500 (xy) 1800 (z) non - linearity % of fs 0.5 cross axis sensitivity % 2 noise 3 g/sqrt(hz) 400 notes: 1. a cceleration ranges are user selectable via i 2 c. 2. resonance as defined by the dampened mechanical sensor. 3. measured in 2g range and including variation over operating temperature range at odr5 (100hz). 2g / 4g / 6g / 8g tri - axis digital accelerometer specifications part number: kxcnl - 1010 rev 3 .0 36 thornwood dr. C ithaca, ny 14850 tel: 607 - 257 - 1080 C fax:607 - 257 - 1146 www.kionix.com - info@kionix.com ? 2013 kionix C all rights reserved 1.0 page 3 of 51 table 2. electrical (specifications are for operation at 2.5 v and t = 25c unless stated otherwise) parameters units min typical max supply voltage (v dd ) operating v 1. 7 2.5 3.6 i/o pads supply voltage (v io ) v 1.12 2.5 v dd current consumption active - mode odr7 ? a 150 active - mode odr5 125 active - mode odr0 35 standby - mode 0.2 off - mode leakage 0.2 output low voltage (v ol ) 1 v 0.2 * v io output high voltage (v oh ) v 0.8 * v io input low voltage (v i l ) v 0 0.3 * v io input high voltage (v ih ) v 0. 7 * v io v io input pull - down current ? a 0 power up time 2 ms 3 start up time 3 ms 2 turn off time 4 ms 1 interrupt pulse width (when pulse selected) ? s 100 i 2 c communication rate 5 mhz 3.4 output data rate (odr) 6 hz 3.125 100 1600 bandwidth ( - 3db) 7 hz odr/2 notes: 1. assuming i 2 c communication and minimum 1.5kohm pull - up resistor on scl and sda pins . 2. power up time is from v io and vdd valid to device boot completion. (off - mode to standby - mode) 3. start up time is from standby - mode to active - mode . 4. turn off time is from active - mode to standby - mode 5. supports i 2 c standard speed ( 100khz), fast speed (400khz), and high speed (3.4mhz) 6. user selectable through i 2 c. 7. user selecta ble and dependant on odr . 2g / 4g / 6g / 8g tri - axis digital accelerometer specifications part number: kxcnl - 1010 rev 3 .0 36 thornwood dr. C ithaca, ny 14850 tel: 607 - 257 - 1080 C fax:607 - 257 - 1146 www.kionix.com - info@kionix.com ? 2013 kionix C all rights reserved 1.0 page 4 of 51 table 3. environmental parameters units min typical max supply voltage (v dd ) absolute limits v - 0.3 - 4 .0 operating temperature range o c - 40 - 85 storage temperature range o c - 55 - 150 mech. shock (powered and unpowered) g - - 5000 for 0.5ms 10000 for 0.2ms esd hbm v - - 2000 mm - - 200 cdm - - 500 caution: esd sensitive and mechanical shock sensitive component, improper handling can cause permanent damage to the device. this product conforms to directive 2002/95/ec of the european parliament and of the council of the european union (rohs). specifically, this product does not contain lead, mercury, cadmium, hexavalent chromium, polybrominated biphenyls (pbb), or polybrominated diphenyl ethers (pbde) above the maximum concentration values (mcv) by weight in any of its ho mogenous materials. homogenous materials are "of uniform composition throughout." this product is halogen - free per iec 61249 - 2 - 21. specifically, the materials used in this product contain a maximum total halogen content of 1500 ppm with less than 900 - p pm bromine and less than 900 - ppm chlorine. floor life factory floor li fe exposure of the kxc nl reels removed from the moisture barrier bag should not exceed a maximum of 168 hours at 30c/70%rh. if this floor life is exceeded, the parts should be dried pe r the ipc/jedec j - std - 033a standard. hf 2g / 4g / 6g / 8g tri - axis digital accelerometer specifications part number: kxcnl - 1010 rev 3 .0 36 thornwood dr. C ithaca, ny 14850 tel: 607 - 257 - 1080 C fax:607 - 257 - 1146 www.kionix.com - info@kionix.com ? 2013 kionix C all rights reserved 1.0 page 5 of 51 terminology g a unit of acceleration equal to the acceleration of gravity at the earth's surface. one thousandth of a g (0.0098 m/ s 2 ) is referred to as 1 milli - g (1 mg). sensitivity the sensitivity of an accelerometer is the change in output per unit of input acceleration at nominal v dd and temperature . the term is essentially the gain of the sensor expressed in counts per g (counts/g) or lsbs per g (lsb/g). occasionally, sensitivi ty is expressed as a resolution, i.e. milli - g per lsb (mg/lsb) or milli - g per count (mg/count) . sensitivity for a given axis is determined by measurements of the formula: the sensitivity tolerance describes the range of s ensitivities that can be expected from a large population of sensors at room temperature and over life . when the temperature deviates from room temperature (25 oc ), the s ensitivity will vary by the amount shown in table 1 . zero - g offset zero - g offset or 0 - g offset describes the actual output of the accelerometer when no acceleration is applied . ideally, t he output would always be in the middle of the dynamic range of the sensor (content of the out x, outy, outz registers = 00h, e xpressed as a 2s complement number). however, because of mismatches in the sensor, calibration errors, and mechanical stress, the output can deviate from 00h. t his deviation from the ideal value is called 0 - g offset. the z ero - g offset tolerance describes the range of 0 - g offsets of a population of sensors over the operating temperature range . self - test self - test allows a functional test of the sensor without applying a physical acceleration to it . when activated, an electrostatic force is applied to the sensor, simulating an i nput acceleration. t he sensor outputs respond accordingly . if the output signals change within the amplitude specified in table 1 , then the sensor is working properly and the parameters of the interface chip are within the defined specificat ions. 2 8 . 9 1 s m g ? ? ? g g output g output y sensitivit 2 1 @ 1 @ ? ? ? ? 2g / 4g / 6g / 8g tri - axis digital accelerometer specifications part number: kxcnl - 1010 rev 3 .0 36 thornwood dr. C ithaca, ny 14850 tel: 607 - 257 - 1080 C fax:607 - 257 - 1146 www.kionix.com - info@kionix.com ? 2013 kionix C all rights reserved 1.0 page 6 of 51 functionality sens e element the sense element is fabricated using kionixs proprietary plasma micromachining process technology. th is process technology allows kionix to create mechanical silicon structures which are essentially mass - spring systems that move in the direction of the appli ed acceleration. acceleration sensing is based on the principle of a differential capacitance arising from the acceleration - ind uced motion . capacitive plates on the moving mass move relative to fixed capacitiv e plates anchored to the substrate . the sense element is hermetically sealed at the wafer level by bonding a second silicon lid wafer to the device using a glass frit. as ic interface a separate asic device packaged with the sense element provides all of the signal conditioning and communication with the sensor . the complete measurement chain is com posed by a low - noise capacitance to voltage amplifier which converts the differential capacitance of the mems sensor into an analog voltage that is sent through an analog - to - digital converter. the acceleration data may be accessed through the i 2 c digital communications provided by the asic. in addition, the asic contains all of the logic to allow the user to choose data rates, g - ranges, filter settings, and interrupt logic. plus, there are two programmable state machines which allow the user to create unique embedded functions based on changes in acceleration. factory calibration kionix trims the offset and sensitivity of each accelerometer by adjusting gain (sensitivity) and 0 - g offset trim codes stored in non volatile memory (otp). additionally, all functional register default values are also programmed into the non volatile mem ory . every time the device is turned on or a software reset command is issued , the trimming parameters and default register values are downloaded into the volatile registers to be used during active operation. this allows the device to function without fur ther calibration. 2g / 4g / 6g / 8g tri - axis digital accelerometer specifications part number: kxcnl - 1010 rev 3 .0 36 thornwood dr. C ithaca, ny 14850 tel: 607 - 257 - 1080 C fax:607 - 257 - 1146 www.kionix.com - info@kionix.com ? 2013 kionix C all rights reserved 1.0 page 7 of 51 application schematic table 4. kxcnl pin descriptions pin name description 1 v io the power supply input for the digital logic and communication bus. decouple this pin to ground with a 0.001 - 0.01uf ceramic capacitor. 2 nc not connected internally. 3 nc not connected internally. 4 scl i 2 c serial clock 5 gnd ground 6 sda i 2 c serial data 7 addr i 2 c address selection. connect to v io or gnd to select i 2 c slave address. 8 nc not connected internally. 9 int2 physical interrupt 2 10 nc not connected internally. 11 int1 physical interrupt 1 / data ready 12 gnd ground 13 nc not connected internally. 14 vdd the main power supply input. deco uple this pin to ground with a 0.1 - 0.47uf ceramic capacitor. 15 nc not connected internally. 16 nc not connected internally. 1 2 3 5 7 9 11 12 13 c 1 kxcnl int 1 io vdd c 2 4 scl 8 6 15 14 16 10 int 2 addr sda vdd 2g / 4g / 6g / 8g tri - axis digital accelerometer specifications part number: kxcnl - 1010 rev 3 .0 36 thornwood dr. C ithaca, ny 14850 tel: 607 - 257 - 1080 C fax:607 - 257 - 1146 www.kionix.com - info@kionix.com ? 2013 kionix C all rights reserved 1.0 page 8 of 51 test specifications ! special characteristics : these characteristics have been identified as being critical to the customer. every part is tested to verify its conformance to specification prior to shipment. table 5. test specifications parameter specification test conditions current consumption odr7 <250ua 25c, vdd = 2.5 v offset 150mg 25c, vdd = 2.5 v odr clock accuracy 10% 25c, vdd = 2.5 v all specifications in tables 1, 2, and 3 which are not listed in table 5 (above) are tested on an audit or validation basis only and are not guaranteed to be within the minimum and maximum values prior to shipment. 2g / 4g / 6g / 8g tri - axis digital accelerometer specifications part number: kxcnl - 1010 rev 3 .0 36 thornwood dr. C ithaca, ny 14850 tel: 607 - 257 - 1080 C fax:607 - 257 - 1146 www.kionix.com - info@kionix.com ? 2013 kionix C all rights reserved 1.0 page 9 of 51 package dimensions and orientation 3 x 3 x 0.9 mm lga all dimensions and tolerances conform to asme y14.5m - 1994 2g / 4g / 6g / 8g tri - axis digital accelerometer specifications part number: kxcnl - 1010 rev 3 .0 36 thornwood dr. C ithaca, ny 14850 tel: 607 - 257 - 1080 C fax:607 - 257 - 1146 www.kionix.com - info@kionix.com ? 2013 kionix C all rights reserved 1.0 page 10 of 51 orientation when device is accelerated in +x, +y or +z direction, the corresponding output will increase. pin 1 +x +y +z 2g / 4g / 6g / 8g tri - axis digital accelerometer specifications part number: kxcnl - 1010 rev 3 .0 36 thornwood dr. C ithaca, ny 14850 tel: 607 - 257 - 1080 C fax:607 - 257 - 1146 www.kionix.com - info@kionix.com ? 2013 kionix C all rights reserved 1.0 page 11 of 51 static x/y/z output response versus orientation to earths surface (1g): sc_1=0, sc_0=0 ( 2g) position 1 2 3 4 5 6 diagram top bottom bottom top x (counts) 0 - 1024 0 1024 0 0 y (counts) - 1024 0 1024 0 0 0 z (counts) 0 0 0 0 0 1024 - 1024 x - polarity 0 - 0 + 0 0 y - polarity - 0 + 0 0 0 z - polarity 0 0 0 0 + - (1g) earths surface static x/y/z output response versus orientation to earths surface (1g): sc_1=0, sc_0= 1 ( 4 g) position 1 2 3 4 5 6 diagram top bottom bottom top x (counts) 0 - 512 0 512 0 0 y (counts) - 512 0 512 0 0 0 z (counts) 0 0 0 0 0 512 - 512 x - polarity 0 - 0 + 0 0 y - polarity - 0 + 0 0 0 z - polarity 0 0 0 0 + - (1g) earths surface 2g / 4g / 6g / 8g tri - axis digital accelerometer specifications part number: kxcnl - 1010 rev 3 .0 36 thornwood dr. C ithaca, ny 14850 tel: 607 - 257 - 1080 C fax:607 - 257 - 1146 www.kionix.com - info@kionix.com ? 2013 kionix C all rights reserved 1.0 page 12 of 51 static x/y/z output response versus orientation to earths surface (1g): sc_1= 1 , sc_0=0 ( 6 g) position 1 2 3 4 5 6 diagram top bottom bottom top x (counts) 0 - 341 0 341 0 0 y (counts) - 341 0 341 0 0 0 z (counts) 0 0 0 0 0 341 - 341 x - polarity 0 - 0 + 0 0 y - polarity - 0 + 0 0 0 z - polarity 0 0 0 0 + - (1g) earths surface static x/y/z output response versus orientation to earths surface (1g): sc_1= 1 , sc_0= 1 ( 8 g) position 1 2 3 4 5 6 diagram top bottom bottom top x (counts) 0 - 256 0 256 0 0 y (counts) - 256 0 256 0 0 0 z (counts) 0 0 0 0 0 256 - 256 x - polarity 0 - 0 + 0 0 y - polarity - 0 + 0 0 0 z - polarity 0 0 0 0 + - (1g) earths surface 2g / 4g / 6g / 8g tri - axis digital accelerometer specifications part number: kxcnl - 1010 rev 3 .0 36 thornwood dr. C ithaca, ny 14850 tel: 607 - 257 - 1080 C fax:607 - 257 - 1146 www.kionix.com - info@kionix.com ? 2013 kionix C all rights reserved 1.0 page 13 of 51 land pattern recommendation soldering soldering recommendations are available upon request or from www.kionix.com . 2g / 4g / 6g / 8g tri - axis digital accelerometer specifications part number: kxcnl - 1010 rev 3 .0 36 thornwood dr. C ithaca, ny 14850 tel: 607 - 257 - 1080 C fax:607 - 257 - 1146 www.kionix.com - info@kionix.com ? 2013 kionix C all rights reserved 1.0 page 14 of 51 state programs the most important feature of the kxcnl is that it has t wo independent state programs which can be programmed by the user to produce i nterrupts and peak values. a state program follows a structure of successive states . from each state (n) it is only possible to have a transition to the next state (n+1) or to the state pointed to by the reset point er (state 1) . transition to the reset point happens when the reset condition is true . transition to the next step happens when next condition is true . an i nterrupt is sent when the output/stop/continue state is reached. in the kxcnl , a state program is a ser ies of states, parameter s and internal memories running an algorithm in its own logic machine. two independent state program areas are defined (state program 1 and state program 2) . ? each p rogram can be one shot run or continuously running. ? output s of progr am are internal interrupt signal and interrupt source information . ? program c ode steps and parameter sets are loaded in to fixed reg ister memory space by the host. ? input data comes from measurement/signal blocks according odr and des2 timing definitions. one sample is the timing base for the next and reset conditions. state programs 1 and 2 are running independently or synchronized but with same input data. interrupts are the main output of the state program s . according program flow, the channel that triggered the interrupt also memorizes its peak (highest or lowest) value. 2g / 4g / 6g / 8g tri - axis digital accelerometer specifications part number: kxcnl - 1010 rev 3 .0 36 thornwood dr. C ithaca, ny 14850 tel: 607 - 257 - 1080 C fax:607 - 257 - 1146 www.kionix.com - info@kionix.com ? 2013 kionix C all rights reserved 1.0 page 15 of 51 state program 1 and 2 are identical and exactly working same manners with some exceptions as extra sub functionalities: ? state program 2 has decimator func tionality. ? state progr am 2 has a difference ( diff ) functionality/filter. the diff filter can be co nfigured with two settings: o difference between current and previo us data values (x,y,z) o difference between current data values and a c onstant ? when diff functionality selected in s tate program 2, vector calculated value (v) is left intact. state programs can be debugged with simple step method and host assistance. when register /cntl1, bit debug == 1, normal measurement data is not fed to the state programs . instead, the host fe eds manual data to the debug input registers (/ x,y, z _debug) to imitate measurement data . this debug d ata is se n t to the state program s after writing the /z_debug register (stepping command like clock). debug (input) data is feed to state programs via registers: ? /x_debug = debug feed for x - channel ? /y_debug = debug feed for y - channel ? /z_debug = debug feed for z - channel 2g / 4g / 6g / 8g tri - axis digital accelerometer specifications part number: kxcnl - 1010 rev 3 .0 36 thornwood dr. C ithaca, ny 14850 tel: 607 - 257 - 1080 C fax:607 - 257 - 1146 www.kionix.com - info@kionix.com ? 2013 kionix C all rights reserved 1.0 page 16 of 51 signal path the acceleration m easurement data flows through several paths according customizable setup of the kxcnl . real acceleration measurement data is available to external applications through the 12 - b it /out_ x, /out_ y, and /out_ z registers . data is provided at the selected odr. the integrated functions of the kxcnl are not using the raw 12 - bit data. t here are seve ral other data forms available for the integrated interrupt functions (state programs). i nternal data sets in 8 - b it format for state programs usage are: ? raw (x,y,z) acceleration data limited in range from - 127 to +127 ? vector (v), calculated and filtered (if enabled), lim ited to range from - 127 to +127 ? diff is data process method which calculates the difference of the current (x,y,z) data measurement to the previous (x,y,z) data measurement or the difference of the current (x,y,z) data measurement to set o f c onstant s. (available only for state program 2) vector calculation and filter total (3d) vector length is calculated with an approximation formula. the c alculated vector length result is filtered with an adjustable band pass filter . the v ector approximation formulas are the following : | | | | | | | | | | | | w here: 2g / 4g / 6g / 8g tri - axis digital accelerometer specifications part number: kxcnl - 1010 rev 3 .0 36 thornwood dr. C ithaca, ny 14850 tel: 607 - 257 - 1080 C fax:607 - 257 - 1146 www.kionix.com - info@kionix.com ? 2013 kionix C all rights reserved 1.0 page 17 of 51 ? x , y , z are the 8 - bit measured acceleration values limited in range from - 127 to +127. ? a 1 and a 2 a re temporary maximum 16 - bit values. ? 45 and 77 are fixed 8 - b it constants. ? 256 is the s cale factor for the calculation . ? v raw is the vector length, maximum 16 - b it scalar temporary value . ? if filtering is not enabled, v raw is fed to the state programs as v after a limiter of - 127 to +127. vector filter: when enabled, the 16 - bit vector scalar ( v raw ) data from the vector calculation phase is passed through a band pass filter. the target corner frequency for the band pass filter is 0.5hz to 10hz (in odr5, 100hz). odr selection affects the corner frequencies so odr5 as 100hz is the main time base for the vector filter. f ilter coefficients are adjustable. the c alculation is performed with maximum 16 - b it temporary values. fir filter, 7 orders (8 taps) ? 4 asymmetric coefficients (8b wide constants) ? 8 tap filter as 4x2 structure o /vfc_ 1, /vfc_2, /vcf_3, /vcf_4 and o - /vfc_1, - /vfc_2, - /vcf_3, - /vcf_4 o reference construction: (53,127,127,53, - 53, - 127, - 127, - 53) ? scale factor for filter output (temporary value) is 256 (16b to 8b) and it is limited to range from - 127 to +127 ? output is 8b filtered vector scalar (v) data (/v_i internal memory) ? last 8 input values are kept in /buf1 to /buf8 (8b) internal memories ve ctor filter can be enabled or disable via register /cntl4, bit vfilt setting. 2g / 4g / 6g / 8g tri - axis digital accelerometer specifications part number: kxcnl - 1010 rev 3 .0 36 thornwood dr. C ithaca, ny 14850 tel: 607 - 257 - 1080 C fax:607 - 257 - 1146 www.kionix.com - info@kionix.com ? 2013 kionix C all rights reserved 1.0 page 18 of 51 power modes the kxcnl has three power modes: off, stand - by, and active. the part exists in one of these three modes at any given time. off and stand - by modes have very low cur rent consumptions. power mode bus state v io v dd function outputs off - off off no sensor activity not available off - on off no sensor activity not available off - off on no sensor activity not available stand - by active on on waiting activation command not available active active on on all functionalities available available off mode one or both of the power supplies (v dd or v io ) are not powered. the sensor is completely inactive and not reporting or communicating. bus communication actions of other devices are not disturbed if they are using the same bus interface as this component. initial startup the preferred startup sequence is to turn on v io before v dd , but if v dd is turned on first, the component will not affect the bus communications (no latch - up or other problems during engine system level wake - up). power on reset (po r) is performed every time when: 1. v io supply is valid 2. v dd power supply is going to valid level or 1. v io power supply is going to valid level 2. v dd supply is valid when por occurs, the following registers and signals are set and the part is put into stand - by mode: ? interrupt ( int1/drdy and int2 ) signals are set to inactive (high z) ? registers set to default: o /stat o /cntl1 (14h) o /cntl2 o /cntl3 o /cntl4 o offset registers (/off_x, /off_y, /off_z) o /outs1, outs2 2g / 4g / 6g / 8g tri - axis digital accelerometer specifications part number: kxcnl - 1010 rev 3 .0 36 thornwood dr. C ithaca, ny 14850 tel: 607 - 257 - 1080 C fax:607 - 257 - 1146 www.kionix.com - info@kionix.com ? 2013 kionix C all rights reserved 1.0 page 19 of 51 stand - by mode the primary function of the stand - by mode is to ensure fast wake - up to active mode and to minimize current consumption. this mode is set as default when both power supplie s are applied and the por function occurs. a soft reset command also performs the por function and puts the part into stand - by mode . stand - by mode is a low power waiting state for fast turn on time. all time critical functionalities are ready to start measurement. bus communication actions of other components are not disturbed if they are using the same bus. there is only one possib le way to change to active mode C a register command via the i 2 c bus. active mode stand - by - mode can be change d to activ e mode by writing to register /cntl1, bit pc = 1. active mode engages the full functionality of accelerometer measurement s . the host also has the ability to change settings in the control registers, readback status registers, and program state machines. active mode to stand - by mode transitions two possible methods for transition from active mode to stand - by mode can be used . 1. r egister /cntl1, pc =0 command: a. status register /stat1 is set to default value b. interrupt ( int1/drdy and int2 ) signals are set to inactive (high z/high impedance) c. register memory is kept intact 2. register /cntl4, strt=1 command : a. changes are performed to physical signal and register values as por sequence when a transition from active mode to stand - by mode and back to active mod e has been done by the host: ? if state program 1 /cntl2, sm1_en = 1 (state program 1 was running in earlier active mode session), then state program 1 is disabled during the stand - by mode and re - enabled when the component is returned to active mode. however, this resets state program 1 to its default initial position. ? if state program 2 /cntl3, sm2_en = 1 (state program 2 was running in earlier active mode session), then state program 2 is disabled during the stand - by mode and re - enabled when the c omponent is returned to active mode. however, this resets state program 1 to its default initial position. 2g / 4g / 6g / 8g tri - axis digital accelerometer specifications part number: kxcnl - 1010 rev 3 .0 36 thornwood dr. C ithaca, ny 14850 tel: 607 - 257 - 1080 C fax:607 - 257 - 1146 www.kionix.com - info@kionix.com ? 2013 kionix C all rights reserved 1.0 page 20 of 51 kxcnl digital interface the kionix kxcnl digital accelerometer has the ability to communicate on the i 2 c digital serial interface bus. this flexibility allows for easy system integration by eliminating analog - to - digital converter requirements and by providing direct communication with system micro - controllers. the serial interface terms and descriptions as indicated in table 6 below will be observed throughout this document. term description transmitter the device that transmits data to the bus. receiver the device that receives data from the bus. master the device that initiates a transfer, generates clock signals, and terminates a transfer. slave the device addressed by the master. table 6. serial interface terminologies i 2 c serial interface as previously mentioned, the kxcnl has the ability to communicate on an i 2 c bus. i 2 c is primarily used for synchronous serial communication between a master device and one or more slave devices. the master, typically a micro controller, provides the serial clock signal and addresses slave devices on the bus. the kxcnl always operates a s a slave device during standard master - slave i 2 c operation. i 2 c is a two - wire serial interface that contains a serial clock (scl) line and a serial data (sda) line. scl is a serial clock that is provided by the master, but can be held low by any slave d evice, putting the master into a wait condition. sda is a bi - directional line used to transmit and receive data to and from the interface. data is transmitted msb (most significant bit) first in 8 - bit per byte format, and the number of bytes transmitted per transfer is unlimited. the i 2 c bus is considered free when both lines are high. i 2 c operation transactions on the i 2 c bus begin after the master transmits a start condition (s), which is defined as a high - to - low transition on the data line while the scl line is held high. the bus is considered busy after this condition. the next byte of data transmitted after the start condition contains the slave address (sad) in the seven msbs (most significant bits), and the lsb (least significant bit) tells whether the master will be receiving data 1 from the slave or transmitting data 0 to the slave. when a slave address is se nt, each device on the bus compares the seven msbs with its internally stored address. if they match, the device considers itself addressed by the master. the slave ad dress associated with the kxcnl is: addr pin status sad sad + read sad + write addr = 0 0011110 (1eh) 00111101 (3dh) 00111100 (3ch) addr = 1 0011101 (1dh) 00111011 (3bh) 00111010 (3ah) it is mandatory that receiving devices acknowledge (ack) each transaction. therefore, the transmitter must release the sda line during this ack pulse. the receiver then pulls the data line low so that it 2g / 4g / 6g / 8g tri - axis digital accelerometer specifications part number: kxcnl - 1010 rev 3 .0 36 thornwood dr. C ithaca, ny 14850 tel: 607 - 257 - 1080 C fax:607 - 257 - 1146 www.kionix.com - info@kionix.com ? 2013 kionix C all rights reserved 1.0 page 21 of 51 remains stable low during the high period of the a ck clock pulse. a receiver that has been addressed, whether it is master or slave, is obliged to generate an ack after each byte of data has been received. to conclude a transaction, the master must transmit a stop condition (p) by transitioning the sda line from low to high while scl is high. the i 2 c bus is now free. writing to a kxcnl 8 - bit register upon power up, the kxcnl enters into stand - by mode. t he i 2 c master must write to the kxcnl s control registers to set its operational mode. therefore, when writing to a control register on the i 2 c bus, as shown sequence 1 on the following page, the following protocol must be observed: after a start condition, sad+w transmission, and the kxcnl ack has been returned, an 8 - bit register address (ra) command is transmitted by the master. this command is telling the kxcnl to which 8 - bit register the master will be writing the data. the kxcnl acknowledges the ra and the master transmits the data to be stored in the 8 - bit register. the kxcnl ackn owledges that it has received the data and the master transmits a stop condition (p) to end the data transfer. the data sent to the kxcnl is now stored in the appropriate register. the kxcnl automatically increments the received ra commands and, therefor e, multiple bytes of data can be written to sequential registers after each slave ack as shown in sequence 2 on the following page. reading from a kxcnl 8 - bit register when reading data from a kxcnl 8 - bit register on the i 2 c bus, as shown in sequence 3 o n the next page, the following protocol must be observed: the master first transmits a start condition (s) and the appropriate slave address (sad) with the lsb set at 0 to write. the kxcnl acknowledges and the master transmits the 8 - bit ra of the regis ter it wants to read. the kxcnl again acknowledges, and the master transmits a repeated start condition (sr). after the repeated start condition, the master addresses the kxcnl with a 1 in the lsb (sad+r) to read from the previously selected register. the slave then acknowledges and transmits the data from the requested register. the master does not acknowledge (nack) it received the transmitted data, but transmits a stop condition to end the data transfer. note that the kxcnl automatically increment s through its sequential registers, allowing data to be read from multiple registers following a single sad+r command as shown below in sequence 4 on the following page. if a receiver cannot transmit or receive another complete byte of data until it has performed some other function, it can hold scl low to force the transmitter into a wait state. data transfer only continues when the receiver is ready for another byte and releases scl. 2g / 4g / 6g / 8g tri - axis digital accelerometer specifications part number: kxcnl - 1010 rev 3 .0 36 thornwood dr. C ithaca, ny 14850 tel: 607 - 257 - 1080 C fax:607 - 257 - 1146 www.kionix.com - info@kionix.com ? 2013 kionix C all rights reserved 1.0 page 22 of 51 data transfer sequences the following information clearly illustrates the variety of data transfers that can occur on the i 2 c bus and how the master and slave interact during these transfers. table 7 defines the i 2 c terms used during the data transfers. term definition s start condition sr repeated start condition sad slave address w write bit r read bit ack acknowledge nack not acknowledge ra register address data transmitted/received data p stop condition table 7. i 2 c terms sequence 1. the master is writing one byte to the slave. master s sad + w ra data p slave ack ack ack sequence 2. the master is writing multiple bytes to the slave. master s sad + w ra data data p slave ack ack ack ack sequence 3. the master is receiving one byte of data from the slave. master s sad + w ra sr sad + r nack p slave ack ack ack data sequence 4. the master is receiving multiple bytes of data from the slave. master s sad + w ra sr sad + r ack nack p slave ack ack ack data data 2g / 4g / 6g / 8g tri - axis digital accelerometer specifications part number: kxcnl - 1010 rev 3 .0 36 thornwood dr. C ithaca, ny 14850 tel: 607 - 257 - 1080 C fax:607 - 257 - 1146 www.kionix.com - info@kionix.com ? 2013 kionix C all rights reserved 1.0 page 23 of 51 hs - mode to enter the 3.4mhz high speed mode of communication, the device must receive the following sequence of conditions from the master: a start condition followed by a master code (00001xxx) and a master non - acknowledge. once recognized, the device switches to hs - mode communication. read/write data transfers then proceed as described in the sequences above. devices return to the fs - mode after a stop occurrence on the bus. sequence 5. hs - mode data transfer of the master writing one byte to the slave . speed fs - mode hs - mode fs - mode master s m - code nack s sad + w ra data p slave ack ack ack 2g / 4g / 6g / 8g tri - axis digital accelerometer specifications part number: kxcnl - 1010 rev 3 .0 36 thornwood dr. C ithaca, ny 14850 tel: 607 - 257 - 1080 C fax:607 - 257 - 1146 www.kionix.com - info@kionix.com ? 2013 kionix C all rights reserved 1.0 page 24 of 51 kxcnl register map register name type read/write i 2 c read/write address hex binary reserved 1 00h C 0ch 0000 0000 C 0000 1100 / info1 r 0dh 0000 1101 / info2 r 0eh 0000 1110 / wia r 0fh 0000 1111 / outx _l r 10h 0001 0000 / outx _h r 11h 0001 0001 / out y _l r 12h 0001 0010 / out y _h r 13h 0001 0011 / out z _l r 14h 0001 0100 / out z _h r 15h 0001 0101 / lc_l r/w 16h 0001 0110 / lc_h r/w 17h 0001 0111 / stat r 18h 0001 1000 / peak 1 r 19h 0001 1001 / peak 2 r 1ah 0001 1010 / cntl 1 r/w 1bh 0001 1011 / cntl 2 r/w 1ch 0001 1100 / cntl3 r/w 1dh 0001 1101 / cntl4 r/w 1eh 0001 1110 / thrs 3 r/w 1fh 0001 1111 / off _x r/w 20h 0010 0000 / off _y r/w 21h 0010 0001 / off _z r/w 22h 0010 0010 reserved 1 23h 0010 0011 / cs_x r/w 24h 0010 0100 / cs_y r/w 25h 0010 0101 / cs_z r/w 26h 0010 0110 reserved 1 27h 0010 0111 / x_debug r/w 28h 0010 1000 / y_ d ebug r/w 29h 0010 1001 / z_debug r/w 2ah 0010 1010 reserved 1 r/w 2bh 0010 1011 / vfc_ 1 r/w 2ch 0010 1100 / vfc_ 2 r/w 2dh 0010 1101 / vfc_ 3 r/w 2eh 0010 1110 / vfc_ 4 r/w 2fh 0010 1111 reserved 1 30h C 3fh 0011 0000 C 0011 1111 / st1_1 w 40h 0100 0000 / st2_1 w 41h 0100 0001 / st3_1 w 42h 0100 0010 / st4_1 w 43h 0100 0011 / st5_1 w 44h 0100 0100 / st6_1 w 45h 0100 0101 / st7_1 w 46h 0100 0110 / st8_1 w 47h 0100 0111 / st9_1 w 48h 0100 1000 / st10_1 w 49h 0100 1001 / st11_1 w 4ah 0100 1010 / st12_1 w 4bh 0100 1011 / st13_1 w 4ch 0100 1100 / st14_1 w 4dh 0100 1101 / st15_1 w 4eh 0100 1110 / st16_1 w 4fh 0100 1111 / tim 4_1 w 50h 0101 0000 / tim 3_1 w 51h 0101 0001 2g / 4g / 6g / 8g tri - axis digital accelerometer specifications part number: kxcnl - 1010 rev 3 .0 36 thornwood dr. C ithaca, ny 14850 tel: 607 - 257 - 1080 C fax:607 - 257 - 1146 www.kionix.com - info@kionix.com ? 2013 kionix C all rights reserved 1.0 page 25 of 51 register name type read/write i 2 c read/write address hex binary / tim 2_1 _l w 52h 0101 0010 / tim 2_1 _h w 53h 0101 0011 / tim 1_1 _l w 54h 0101 0100 / tim 1_1_h w 55h 0101 0101 / thrs 2 _ 1 w 56h 0101 0110 / thrs 1_1 w 57h 0101 0111 not used C fixed content r 58h 0101 1000 / sa1 w 59h 0101 1001 / ma1 w 5ah 0101 1010 / sett1 w 5bh 0101 1011 / p p r p 1 r 5ch 0101 1100 / tc1_l r 5dh 0101 1101 / tc1_h r 5eh 0101 1110 / outs1 r 5fh 0101 1111 / st1_2 w 60h 0110 0000 / st2_2 w 61h 0110 0001 / st3_2 w 62h 0110 0010 / st4_2 w 63h 0110 0011 / st5_2 w 64h 0110 0100 / st6_2 w 65h 0110 0101 / st7_2 w 66h 0110 0110 / st8_2 w 67h 0110 0111 / st9_2 w 68h 0110 1000 / st10_2 w 69h 0110 1001 / st11_2 w 6ah 0110 1010 / st12_2 w 6bh 0110 1011 / st13_2 w 6ch 0110 1100 / st14_2 w 6dh 0110 1101 / st15_2 w 6eh 0110 1110 / st16_2 w 6fh 0110 1111 / tim 4_2 w 70h 0111 0000 / tim 3_2 w 71h 0111 0001 / tim 2_2_l w 72h 0111 0010 / tim 2_2_h w 73h 0111 0011 / tim 1_2_l w 74h 0111 0100 / tim 1_2_h w 75h 0111 0101 / thrs 2_2 w 76h 0111 0110 / thrs 1_2 w 77h 0111 0111 / des2 w 78h 0111 1000 / sa2 w 79h 0111 1001 / ma2 w 7ah 0111 1010 / sett2 w 7bh 0111 1011 / pprp 2 r 7ch 0111 1100 / tc2_l r 7dh 0111 1101 / tc2_h r 7eh 0111 1110 / outs2 r 7fh 0111 1111 notes: 1. reserved registers should not be written to. 2g / 4g / 6g / 8g tri - axis digital accelerometer specifications part number: kxcnl - 1010 rev 3 .0 36 thornwood dr. C ithaca, ny 14850 tel: 607 - 257 - 1080 C fax:607 - 257 - 1146 www.kionix.com - info@kionix.com ? 2013 kionix C all rights reserved 1.0 page 26 of 51 kxcnl register descriptions information registers / info1 this register can be used for optional supplier information. r r r r r r r r x x x x x x x x reset value bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 000000 00 i 2 c address: 0x0dh / info2 a second register can be used for optional supplier information. r r r r r r r r x x x x x x x x reset value bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 00000000 i 2 c address: 0x0eh / wia this register can be used for supplier recognition (who i am id), as it can be factory written to a known byte value. the default value is 0x 0b h . r r r r r r r r wia7 wia6 wia5 wia4 wia3 wia2 wia1 wia0 reset value bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 000 01 0 1 1 i 2 c address: 0x0fh accelerometer outputs these registers contain up to 12 - bits of valid acceleration data for each axis. the data is updated every user - defined odr period, is protected from overwrite during each read, and can be converted from digital counts to acceleration (g) per table 8 below . if / cntl1, debug == 0, data is used for state programs . if / cntl1, debug == 1, data is not f ed to state programs . data is provided as a signed value (upp er part of msb is sign adjusted) in little endian form. 12 - bit data range = +/ - 2g range = +/ - 4g range = +/ - 6g range = +/ - 8g 0111 1111 1111 +1.999g +3.998g +5.997g +7.996g 0111 1111 1110 +1.998g +3.996g +5.994g +7.992g 2g / 4g / 6g / 8g tri - axis digital accelerometer specifications part number: kxcnl - 1010 rev 3 .0 36 thornwood dr. C ithaca, ny 14850 tel: 607 - 257 - 1080 C fax:607 - 257 - 1146 www.kionix.com - info@kionix.com ? 2013 kionix C all rights reserved 1.0 page 27 of 51 12 - bit data range = +/ - 2g range = +/ - 4g range = +/ - 6g range = +/ - 8g 1000 0000 0001 - 1.999g - 3.998g - 5.997g - 7.996g 1000 0000 0000 - 2.000g - 4.000g - 6.000g - 8.000g table 8. acceleration (g) calculation / outx_l x - axis accelerometer output least significant byte r r r r r r r r xoutd7 xoutd6 xoutd5 xoutd4 xoutd3 xoutd2 xoutd1 xoutd0 bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 i 2 c address: 0x10h / outx_h x - axis accelerometer output most significant byte r r r r r r r r xoutd11 xoutd11 xoutd11 xoutd11 xoutd11 xoutd10 xoutd9 xoutd8 bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 i 2 c address: 0x11h / outy_l y - axis accelerometer output least significant byte r r r r r r r r youtd7 youtd6 youtd5 youtd4 youtd3 youtd2 youtd1 youtd0 bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 i 2 c address: 0x12h / outy_h y - axis accelerometer output most significant byte r r r r r r r r youtd11 youtd1 1 youtd 11 youtd 11 youtd 11 youtd 10 youtd 9 youtd 8 bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 i 2 c address: 0x13h / outz_l z - axis accelerometer output least significant byte r r r r r r r r zoutd7 zoutd6 zoutd5 zoutd4 zoutd3 zoutd2 zoutd1 zoutd0 bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 i 2 c address: 0x14h 2g / 4g / 6g / 8g tri - axis digital accelerometer specifications part number: kxcnl - 1010 rev 3 .0 36 thornwood dr. C ithaca, ny 14850 tel: 607 - 257 - 1080 C fax:607 - 257 - 1146 www.kionix.com - info@kionix.com ? 2013 kionix C all rights reserved 1.0 page 28 of 51 / outz_h z - axis accelerometer output most significant byte r r r r r r r r zoutd11 zoutd1 1 zoutd 11 zoutd 11 zoutd 11 zoutd 10 zoutd 9 zoutd 8 bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 i 2 c address: 0x15h long counter these two registers contain up to 16 - bits of long counter information . /lc_l long counter least significant byte r r r r r r r r lc7 lc 6 lc 5 lc 4 lc 3 lc 2 lc 1 lc 0 reset value bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 11111111 i 2 c address: 0x16h /lc_h long counter most significant byte r r r r r r r r lc15 lc 14 lc 13 lc 12 lc 11 lc 10 lc 9 lc 8 reset value bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 11111111 i 2 c address: 0x17h /lc counter = - 01h, status: /lc is not valid, counting stopped /lc counter = 00h, status: /lc counter is full, interrupt happens and - 01h will be set to counter /lc counter > 00h, status: /lc counting reading of the /lc counter resets the /stat, long fl ag to default (0) . 2g / 4g / 6g / 8g tri - axis digital accelerometer specifications part number: kxcnl - 1010 rev 3 .0 36 thornwood dr. C ithaca, ny 14850 tel: 607 - 257 - 1080 C fax:607 - 257 - 1146 www.kionix.com - info@kionix.com ? 2013 kionix C all rights reserved 1.0 page 29 of 51 /stat this register reports the status of the accelerometer output. r r r r r r r r long syncw sync1 sync2 int_sm1 int_sm2 dor drdy reset value bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 00000000 i 2 c address: 0x18h long is the long counter interrupt and is common to both state programs. reset to default value by reading /lc register. long = 0 C no interrupt long = 1 C long counter /lc interrupt flag syncw provides common information for outw host action waiting. reset to default value when outsy register (state program 1 or 2) is read. syncw = 0 C no actions are waiting from the host syncw = 1 C host action is waiting after outw command. sync1 reports the synchronization status of state program 1 . sync1 = 0 C state program 1 running normally. sync1 = 1 C state program 1 stopped and waiting for restart request from state program 2. sync2 reports the synchronization status of state program 2 . sync2 = 0 C state program 2 running normally. sync2 = 1 C state program 2 stopped and waiting for restart request from state program 1. int_sm1 reports the interrupt status of state program 1 . i nterrupt info mation is released/reset when /outs1 register read . int_sm1 = 0 C no state program 1 interrupt. int_sm1 = 1 C state program 1 interrupt. int_sm2 reports the interrupt status of state program 2 . i nterrupt info mation is released/reset when /outs 2 register read . int_sm2 = 0 C no state program 2 interrupt. int_sm2 = 1 C state program 2 interrupt. dor reports a d ata overrun condition when the stream data is not read from the output register s before the next data samples are starting to be measured. this data overrun bit is reset when the next sample is ready . dor = 0 C no data overrun. dor = 1 C data overrun. drdy reports the data ready condition of the streaming data. drdy = 0 C data not ready . drdy = 1 C data ready . 2g / 4g / 6g / 8g tri - axis digital accelerometer specifications part number: kxcnl - 1010 rev 3 .0 36 thornwood dr. C ithaca, ny 14850 tel: 607 - 257 - 1080 C fax:607 - 257 - 1146 www.kionix.com - info@kionix.com ? 2013 kionix C all rights reserved 1.0 page 30 of 51 / peak1 peak detector value for next condition of state program 1. state program 1 stores the highest/lowest peak data value to this regist er. /peak1 value is reset when rel command occurs or new initial start occurs . r r r r r r r r peak1_7 peak1_6 peak1_5 peak1_4 peak1_3 peak1_2 peak1_1 peak1_0 reset value bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 00000000 i 2 c address: 0x19h / peak2 peak detector value for next condition of state program 2. state program 2 stores the highest/lowest peak data value to this regist er. /peak 2 value is reset when rel command occurs or new initial start occurs . r r r r r r r r peak2_7 peak2_6 peak2_5 peak2_4 peak2_3 peak2_2 peak2_1 peak2_0 reset value bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 00000000 i 2 c address: 0x1ah / cntl 1 read/write control register that controls the main feature set. r/w r/w r/w r/w r/w r/w r/w r/w pc sc_1 sc_0 odr_2 odr_1 odr_0 debug ien reset value bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 00010100 i 2 c address: 0x 1b h pc controls the operating mode of the kxcnl . pc = 0 C stand - by mode pc = 1 C operating (active) mode sc_ 1, sc_ 0 sets the g - range for the accelerometer outputs per table 12. the default g - range is 2 g . sc_1 sc_0 g - range 0 0 2 g 0 1 4 g 1 0 6 g 1 1 8 g table 12. g - range odr_2, odr _1, odr _ 0 sets the output data rate for the accelerometer outputs per table 12. the default odr is 10 0hz. 2g / 4g / 6g / 8g tri - axis digital accelerometer specifications part number: kxcnl - 1010 rev 3 .0 36 thornwood dr. C ithaca, ny 14850 tel: 607 - 257 - 1080 C fax:607 - 257 - 1146 www.kionix.com - info@kionix.com ? 2013 kionix C all rights reserved 1.0 page 31 of 51 name odr_2 odr_1 odr_0 output data rate filter cf odr0 0 0 0 3.125 hz none odr 1 0 0 1 6.25 hz none odr 2 0 1 0 12.5 hz none odr 3 0 1 1 25 hz none odr 4 1 0 0 50 hz none odr 5 1 0 1 100 hz 50 hz odr 6 1 1 0 400 hz 200 hz odr 7 1 1 1 1600 hz 800 hz table 12. output data rate debug controls the state program step debug mode of the kxcnl . debug = 0 C normal operation of state programs with /outx, /outy, and /outz stream data registers are fed to state programs. debug = 1 C debug stepping of state programs with /outx, /outy, and /outz stream data registers not fed to state programs. debug inputs are fetched from /x, y, z_debug registers. one step of the state programs is processed with the write of /z_debug. ien is the main interrupt enable switch to allow state programs to route interrupts to int1/drdy and int2 pads . ien = 0 C physical interrupts disabled. i en = 1 C physical interrupts enabled. / cntl 2 read/write control register that controls the state program 1. r/w r/w r/w r/w r/w r/w r/w r/w hyst2_1 hyst1_1 hyst0_1 0 sm1_pin 0 0 sm1_en reset value bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 000 0 0 0 00 i 2 c address: 0x1ch hyst2_1, hyst1_1, hyst0_1 sets the (unsigned) hysteresis limit which is added or subtracted from the thres hold value in state program 1. 000 = 0 lsb (default) 111 = 7 lsb (maximum hysteresis) sm1_pin controls the routing of the state program 1 interrupt. sm1_pin = 0 C state program 1 interrupt routed to int1 sm1_pin = 1 C state program 1 interrupt routed to int2 sm1_en enables state program 1. changing this bit from a 0 to a 1 initiates state program 1. state program 1 can control this bit according to the program code. 2g / 4g / 6g / 8g tri - axis digital accelerometer specifications part number: kxcnl - 1010 rev 3 .0 36 thornwood dr. C ithaca, ny 14850 tel: 607 - 257 - 1080 C fax:607 - 257 - 1146 www.kionix.com - info@kionix.com ? 2013 kionix C all rights reserved 1.0 page 32 of 51 sm1_en = 0 C state program 1 disabled. all state program 1 related temporary memories and registers are left intact. sm1_en = 1 C state program 1 enabled. default ini tial start - task of state program 1 is started. / cntl 3 read/write control register that controls the state program 2. r/w r/w r/w r/w r/w r/w r/w r/w hyst2_2 hyst1_2 hyst0_2 0 sm2_pin 0 0 sm2_en reset value bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 000 0 0 0 00 i 2 c address: 0x1dh hyst2_2, hyst1_2, hyst0_2 sets the (unsigned) hysteresis limit which is added or subtracted from the threshold value in state program 2. 000 = 0 lsb (default) 111 = 7 lsb (maximum hysteresis) sm2_pin controls the routing of the state program 2 interrupt. sm2_pin = 0 C state program 2 interrupt routed to int1 sm2_pin = 1 C state program 2 interrupt routed to int2 sm2_en enables state program 2. changing this bit from a 0 to a 1 initiates state pr ogram 2. state program 2 can control this bit according to the program code. sm2_en = 0 C state program 2 disabled. all state program 2 related temporary memories and registers are left intact. sm2_en = 1 C state program 2 enabled. default initial star t - task of state program 2 is started. / cntl 4 read/write control register that controls several functions of the kxcnl . r/w r/w r/w r/w r/w r/w r/w r/w dr_en iea iel int2_en int1_en vfilt stp strt reset value bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 000 0 0 0 00 i 2 c address: 0x1eh dr_en sends the data ready signal (drdy) to the int1 pin. dr_en = 0 data ready signal is not connected to int1. dr_en = 1 data ready signal is connected to int1 and overrides any other interrupt settings. iea controls the polarity of interrupt signals. iea = 0 C interrupt signals active low. 2g / 4g / 6g / 8g tri - axis digital accelerometer specifications part number: kxcnl - 1010 rev 3 .0 36 thornwood dr. C ithaca, ny 14850 tel: 607 - 257 - 1080 C fax:607 - 257 - 1146 www.kionix.com - info@kionix.com ? 2013 kionix C all rights reserved 1.0 page 33 of 51 iea = 1 C interrupt signals active high. iel controls the latching state of interrupt signals. iea = 0 C interrupt signals are latched. iea = 1 C interrupt signals are pulsed. int2_en enables the int2 pin. int2_en = 0 C int2 signal disabled. int2 pin in high - z state. int2_en = 1 C int2 signal enabled and signal is fully functional . \ cntl1, ien must be taken into account also. int1_en enables the int1/drdy pin. int1_en = 0 C int1/drdy signal disabled. int1/drdy pin in high - z state. int1_en = 1 C int1/drdy signal enabled and signal is fully functional. \ cntl1, ien or /cntl4, dr_en must be taken into account also. vfilt enables or disables the vector filter. vfilt = 0 C vector filter disabled. vfilt = 1 C vector filter enabled. stp controls the activation of self test. stp = 0 C normal operation with no self test effect. stp = 1 C positive self test effect. strt performs a soft reset of the kxcnl if set to a 1. similar to por, defaults for registers are loaded from internal memory. once the reset is complete, this bit is set to 0. /thrs3 read/write register that contains the common threshold for overrun detec tion. this threshold is always unsigned (abs) regardless of /setty, abs settings and is common to both state programs . i f any axis value exceed s /thrs3 limit (regardless /tamxay status) , then the reset action (/ppy =/rpy) and the reset initial start task i mmediately occur. r/w r/w r/w r/w r/w r/w r/w r/w thrs3_7 thrs3_6 thrs3_5 thrs3_4 thrs3_3 thrs3_2 thrs3_1 thrs3_0 reset value bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 000 0 0 0 00 i 2 c address: 0x1fh offset correction the following three registers contain up to 8 - bits of offset correction for each axis. because there are typically offset drifts after solder reflow, there is sometimes a need to zero or normalize the outputs for better application performance . these signed offset correcti on values are multiplied by 2 and subtracted from the outputs provided to the state programs and to the streaming 12 - bit data registers. 2g / 4g / 6g / 8g tri - axis digital accelerometer specifications part number: kxcnl - 1010 rev 3 .0 36 thornwood dr. C ithaca, ny 14850 tel: 607 - 257 - 1080 C fax:607 - 257 - 1146 www.kionix.com - info@kionix.com ? 2013 kionix C all rights reserved 1.0 page 34 of 51 / off_x x - axis accelerometer offset correction r/w r/w r/w r/w r/w r/w r/w r/w off_x7 off_x6 off_x5 off_x4 off_x3 off_x2 off_x1 off_x0 reset value bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 000 0 0 0 00 i 2 c address: 0x20h /o ff_y y - axis accelerometer offset correction r/w r/w r/w r/w r/w r/w r/w r/w off_y7 off_y6 off_y5 off_y4 off_y3 off_y2 off_y1 off_y0 reset value bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 000 0 0 0 00 i 2 c address: 0x21h / off_z z - axis accelerometer offset correction r/w r/w r/w r/w r/w r/w r/w r/w off_z7 off_z6 off_z5 off_z4 off_z3 off_z2 off_z1 off_z0 reset value bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 000 0 0 0 00 i 2 c address: 0x22h constant shift the following three registers contain up to 8 - bits of constant shift data for each axis. the constant shift acts like a temporary offset shift and is used for the diff function available only inside state program 2. /cs_x x - axis accelerometer constant shift r/w r/w r/w r/w r/w r/w r/w r/w cs_x7 cs_x6 cs_x5 cs_x4 cs_x3 cs_x2 cs_x1 cs_x0 reset value bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 000 0 0 0 00 i 2 c address: 0x24h 2g / 4g / 6g / 8g tri - axis digital accelerometer specifications part number: kxcnl - 1010 rev 3 .0 36 thornwood dr. C ithaca, ny 14850 tel: 607 - 257 - 1080 C fax:607 - 257 - 1146 www.kionix.com - info@kionix.com ? 2013 kionix C all rights reserved 1.0 page 35 of 51 /cs_y y - axis accelerometer constant shift r/w r/w r/w r/w r/w r/w r/w r/w cs_y7 cs_y6 cs_y5 cs_y4 cs_y3 cs_y2 cs_y1 cs_y0 reset value bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 000 0 0 0 00 i 2 c address: 0x25h /cs_z z - axis accelerometer constant shift r/w r/w r/w r/w r/w r/w r/w r/w cs_z7 cs_z6 cs_z5 cs_z4 cs_z3 cs_z2 cs_z1 cs_z0 reset value bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 000 0 0 0 00 i 2 c address: 0x26h debug input the following three registers contain 8 - bits of debug input data for each axis. if /cntl1, debug == 1, data from these registers is fed to the state programs when /outsx is read (as step command) . /x_debug x - axis accelerometer debug input r/w r/w r/w r/w r/w r/w r/w r/w x_debug7 x_debug6 x_debug5 x_debug4 x_debug3 x_debug2 x_debug1 x_debug0 reset value bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 000 0 0 0 00 i 2 c address: 0x2 8 h /y_debug y - axis accelerometer debug input r/w r/w r/w r/w r/w r/w r/w r/w y_debug 7 y_debug 6 y_debug 5 y_debug 4 y_debug 3 y_debug 2 y_debug 1 y_debug 0 reset value bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 000 0 0 0 00 i 2 c address: 0x29 h /z_debug z - axis accelerometer debug input r/w r/w r/w r/w r/w r/w r/w r/w z_debug 7 z_debug 6 z_debug 5 z_debug 4 z_debug 3 z_debug 2 z_debug 1 z_debug 0 reset value bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 000 0 0 0 00 i 2 c address: 0x2a h 2g / 4g / 6g / 8g tri - axis digital accelerometer specifications part number: kxcnl - 1010 rev 3 .0 36 thornwood dr. C ithaca, ny 14850 tel: 607 - 257 - 1080 C fax:607 - 257 - 1146 www.kionix.com - info@kionix.com ? 2013 kionix C all rights reserved 1.0 page 36 of 51 vector filter coefficients total acceleration vector length is calculated with an approximation formula. the calculated vector length result is filtered with an adjustable band pass filter. the following four registers contain 8 - bit vector filter coefficients. / vfc_1 vector ca lculation filter coefficient 1 r/w r/w r/w r/w r/w r/w r/w r/w vfc1_ 7 vfc1_ 6 vfc1_ 5 vfc1_ 4 vfc1_ 3 vfc1_ 2 vfc1_ 1 vfc1_ 0 reset value bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 000 0 0 0 00 i 2 c address: 0x2 c h /vfc_2 vector calculation filter coefficient 2 r/w r/w r/w r/w r/w r/w r/w r/w vfc2_7 vfc2_6 vfc2_5 vfc2_4 vfc2_3 vfc2_2 vfc2_1 vfc2_0 reset value bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 000 0 0 0 00 i 2 c address: 0x2 d h /vfc_3 vector calculation filter coefficient 3 r/w r/w r/w r/w r/w r/w r/w r/w vfc3_7 vfc3_6 vfc3_5 vfc3_4 vfc3_3 vfc3_2 vfc3_1 vfc3_0 reset value bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 000 0 0 0 00 i 2 c address: 0x2 e h /vfc_4 vector calculation filter coefficient 4 r/w r/w r/w r/w r/w r/w r/w r/w vfc4_7 vfc4_6 vfc4_5 vfc4_4 vfc4_3 vfc4_2 vfc4_1 vfc4_0 reset value bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 000 0 0 0 00 i 2 c address: 0x2 f h 2g / 4g / 6g / 8g tri - axis digital accelerometer specifications part number: kxcnl - 1010 rev 3 .0 36 thornwood dr. C ithaca, ny 14850 tel: 607 - 257 - 1080 C fax:607 - 257 - 1146 www.kionix.com - info@kionix.com ? 2013 kionix C all rights reserved 1.0 page 37 of 51 state program 1 the following 32 registers pertain to state program 1. they contain the program code, timers, thresholds, masks, settings, and outputs. register name i 2 c address read/write name description /st1_1 0x40 - /w step 1 code /st2_1 0x41 - /w step 2 code /st3_1 0x42 - /w step 3 code /st4_1 0x43 - /w step 4 code /st5_1 0x44 - /w step 5 code /st6_1 0x45 - /w step 6 code /st7_1 0x46 - /w step 7 code /st8_1 0x47 - /w step 8 code /st9_1 0x48 - /w step 9 code /st10_1 0x49 - /w step 10 code /st11_1 0x4a - /w step 11 code /st12_1 0x4b - /w step 12 code /st13_1 0x4c - /w step 13 code /st14_1 0x4d - /w step 14 code /st15_1 0x4e - /w step 15 c ode /st16_1 0x4f - /w step 16 c ode /tim4_1 0x50 - /w timer 4 general timer parameter, unsigned value /tim3_1 0x51 - /w timer 3 general timer parameter, unsigned value /tim2_1 0x52 - /w timer 2 lsb general timer parameter, unsigned value 0x53 - /w timer 2 msb /tim1_1 0x54 - /w timer 1 lsb general timer parameter, unsigned value 0x55 - /w timer 1 msb /thrs2_1 0x56 - /w threshold 2 signed value /thrs1_1 0x57 - /w threshold 1 signed value 2g / 4g / 6g / 8g tri - axis digital accelerometer specifications part number: kxcnl - 1010 rev 3 .0 36 thornwood dr. C ithaca, ny 14850 tel: 607 - 257 - 1080 C fax:607 - 257 - 1146 www.kionix.com - info@kionix.com ? 2013 kionix C all rights reserved 1.0 page 38 of 51 /sa1 the register that controls the settings of swap axis and sign masks . - /w - /w - /w - /w - /w - /w - /w - /w p_x n_x p_y n_y p_z n_z p_v n_v bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 i 2 c address: 0x59h p_x is axis mask x+ . p_x = 0 x+ disabled . p_x = 1 x+ enabled . n_x is axis mask x - . n_x = 0 x - disabled. n_x = 1 x - enabled. p_y is axis mask y + . p_y = 0 y+ disabled. p_y = 1 y+ enabled. n_y is axis mask y - . n_y = 0 y - disabled. n_y = 1 y - enabled. p_z is axis mask z + . p_z = 0 z+ disabled. p_z = 1 z+ enabled. n_z is axis mask z - . n_z = 0 z - disabled. n_z = 1 z - enabled. p_v is axis mask v + . p_v = 0 v+ disabled. p_v = 1 v+ enabled. n_v is axis mask v - . n_v = 0 v - disabled. n_v = 1 v - enabled. 2g / 4g / 6g / 8g tri - axis digital accelerometer specifications part number: kxcnl - 1010 rev 3 .0 36 thornwood dr. C ithaca, ny 14850 tel: 607 - 257 - 1080 C fax:607 - 257 - 1146 www.kionix.com - info@kionix.com ? 2013 kionix C all rights reserved 1.0 page 39 of 51 /ma1 the register that controls the default settings of axis and sign masks. - /w - /w - /w - /w - /w - /w - /w - /w p_x n_x p_y n_y p_z n_z p_v n_v bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 i 2 c address: 0x5ah p_x is axis mask x+ . p_x = 0 x+ disabled. p_x = 1 x+ enabled. n_x is axis mask x - . n_x = 0 x - disabled. n_x = 1 x - enabled. p_y is axis mask y + . p_y = 0 y+ disabled. p_y = 1 y+ enabled. n_y is axis mask y - . n_y = 0 y - disabled. n_y = 1 y - enabled. p_z is axis mask z + . p_z = 0 z+ disabled. p_z = 1 z+ enabled. n_z is axis mask z - . n_z = 0 z - disabled. n_z = 1 z - enabled. p_v is axis mask v + . p_v = 0 v+ disabled. p_v = 1 v+ enabled. n_v is axis mask v - . n_v = 0 v - disabled. n_v = 1 v - enabled. 2g / 4g / 6g / 8g tri - axis digital accelerometer specifications part number: kxcnl - 1010 rev 3 .0 36 thornwood dr. C ithaca, ny 14850 tel: 607 - 257 - 1080 C fax:607 - 257 - 1146 www.kionix.com - info@kionix.com ? 2013 kionix C all rights reserved 1.0 page 40 of 51 /sett1 the register that controls the state program 1 flow. - /w - /w - /w - /w - /w - /w - /w - /w p_det thr3_sa abs 0 0 thr3_ma r_tam sitr bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 i 2 c address: 0x5bh p_det is the peak detection control bit. p_det = 0 peak detection disabled. p_det = 1 peak detection enabled in state program 1. thr3_sa controls the reset action when t hreshold 3 is exceeded and mask is /sa1. thr3_sa = 0 no action. thr3_sa = 1 exceeding threshold 3 immediately triggers reset action if ma sk is /sa1 (/masa1 == 1) . every sample and every axis is tested to determine if it exceeds threshold 3 regardless of the /tamxa1 value. /thrs3 (register) limit is common for both state programs. abs is the peak absolute threshold enable/disable control . abs = 0 unsigned thresholds . thresholds are symmetric across the zero line. abs = 1 signed thresholds in state program 1. thresholds are sign dependent. thr3_ma controls the reset action when threshold 3 is exceeded and mask is /ma1. thr3_ma = 0 no acti on. thr3_ma = 1 exceeding threshold 3 immediately triggers reset action if mask is /sa1 (/masa1 == 0). every sample and every axis is tested to determine if it exceeds threshold 3 regardless of the /tamxa1 value. /thrs3 (register) limit is common for both state programs. r_tam is the temporary axis mask and peak state flag release. r_tam = 0 no changes for /tamxa1. r_tam = 1 /tamxa1 released to default after every valid next condition. sitr is the temporary axis mask and peak state flag release. sitr = 0 no actions. sitr = 1 stop and cont commands proceeds also output as outc command. 2g / 4g / 6g / 8g tri - axis digital accelerometer specifications part number: kxcnl - 1010 rev 3 .0 36 thornwood dr. C ithaca, ny 14850 tel: 607 - 257 - 1080 C fax:607 - 257 - 1146 www.kionix.com - info@kionix.com ? 2013 kionix C all rights reserved 1.0 page 41 of 51 /pr1 the register contains the program pointer (pp1) address and the reset point (rp1) address. the i nternal addres ses for program flow management are reported in an unsi gned 4 b +4b valu e. /pr1 _pp1 is the lsb part of byte (/pp1) and /pr1_rp1 is the msb part of byte ( /rp1) r r r r r r r r rp1_3 rp1_2 rp1_1 rp1_0 pp1_3 pp1_2 pp1_1 pp1_0 reset value bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 00000000 i 2 c address: 0x5ch /tc1_l current timer counter value (unsigned) least significant byte r r r r r r r r tc1_7 tc1_6 tc1_5 tc1_4 tc1_3 tc1_2 tc1_1 tc1_0 reset value bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 00000000 i 2 c address: 0x5dh /tc1_h current timer counter value (unsigned) most significant byte r r r r r r r r tc1_15 tc1_14 tc1_13 tc1_12 tc1_11 tc1_10 tc1_9 tc1_8 reset value bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 00000000 i 2 c address: 0x5eh /outs1 the output register containing the main set flags. reading this register affects the interrupt release function. this register is set to default after the host reads this register. r r r r r r r r p_x n_x p_y n_y p_z n_z p_v n_v reset value bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 00000000 i 2 c address: 0x5fh p_x is axis mask x+ . p_x = 0 x+ no show. p_x = 1 x+ show. n_x is axis mask x - . n_x = 0 x - no show. n_x = 1 x - show. p_y is axis mask y + . 2g / 4g / 6g / 8g tri - axis digital accelerometer specifications part number: kxcnl - 1010 rev 3 .0 36 thornwood dr. C ithaca, ny 14850 tel: 607 - 257 - 1080 C fax:607 - 257 - 1146 www.kionix.com - info@kionix.com ? 2013 kionix C all rights reserved 1.0 page 42 of 51 p_y = 0 y+ no show. p_y = 1 y+ show. n_y is axis mask y - . n_y = 0 y - no show. n_y = 1 y - show. p_z is axis mask z + . p_z = 0 z+ no show. p_z = 1 z+ show. n_z is axis mask z - . n_z = 0 z - no show. n_z = 1 z - show. p_v is axis mask v + . p_v = 0 v+ no show. p_v = 1 v+ show. n_v is axis mask v - . n_v = 0 v - no show. n_v = 1 v - show. 2g / 4g / 6g / 8g tri - axis digital accelerometer specifications part number: kxcnl - 1010 rev 3 .0 36 thornwood dr. C ithaca, ny 14850 tel: 607 - 257 - 1080 C fax:607 - 257 - 1146 www.kionix.com - info@kionix.com ? 2013 kionix C all rights reserved 1.0 page 43 of 51 state program 2 the following 32 registers pertain to state program 2. they contain the program code, timers, thresholds, masks, settings, and outputs. register name i 2 c address read/write name description /st1_ 2 0x 6 0 - /w step 1 code /st2_ 2 0x 6 1 - /w step 2 code /st3_ 2 0x 6 2 - /w step 3 code /st4_ 2 0x 6 3 - /w step 4 code /st5_ 2 0x 6 4 - /w step 5 code /st6_ 2 0x 6 5 - /w step 6 code /st7_ 2 0x 6 6 - /w step 7 code /st8_ 2 0x 6 7 - /w step 8 code /st9_ 2 0x 6 8 - /w step 9 code /st10_ 2 0x 6 9 - /w step 10 code /st11_ 2 0x 6 a - /w step 11 code /st12_ 2 0x 6 b - /w step 12 code /st13_ 2 0x 6 c - /w step 13 code /st14_ 2 0x 6 d - /w step 14 code /st15_ 2 0x 6 e - /w step 15 c ode /st16_ 2 0x 6 f - /w step 16 c ode /tim4_ 2 0x 7 0 - /w timer 4 general timer parameter, unsigned value /tim3_ 2 0x 7 1 - /w timer 3 general timer parameter, unsigned value /tim2_ 2 0x 7 2 - /w timer 2 lsb general timer parameter, unsigned value 0x 7 3 - /w timer 2 msb /tim1_ 2 0x 7 4 - /w timer 1 lsb general timer parameter, unsigned value 0x 7 5 - /w timer 1 msb /thrs2_ 2 0x 7 6 - /w threshold 2 signed value /thrs1_ 2 0x 7 7 - /w threshold 1 signed value 2g / 4g / 6g / 8g tri - axis digital accelerometer specifications part number: kxcnl - 1010 rev 3 .0 36 thornwood dr. C ithaca, ny 14850 tel: 607 - 257 - 1080 C fax:607 - 257 - 1146 www.kionix.com - info@kionix.com ? 2013 kionix C all rights reserved 1.0 page 44 of 51 /des2 0x78 - /w decimation initial decimation counter value /sa2 the register that controls the settings of swap axis and sign masks. - /w - /w - /w - /w - /w - /w - /w - /w p_x n_x p_y n_y p_z n_z p_v n_v bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 i 2 c address: 0x 7 9h p_x is axis mask x+ . p_x = 0 x+ disabled. p_x = 1 x+ enabled. n_x is axis mask x - . n_x = 0 x - disabled. n_x = 1 x - enabled. p_y is axis mask y + . p_y = 0 y+ disabled. p_y = 1 y+ enabled. n_y is axis mask y - . n_y = 0 y - disabled. n_y = 1 y - enabled. p_z is axis mask z + . p_z = 0 z+ disabled. p_z = 1 z+ enabled. n_z is axis mask z - . n_z = 0 z - disabled. n_z = 1 z - enabled. p_v is axis mask v + . p_v = 0 v+ disabled. p_v = 1 v+ enabled. n_v is axis mask v - . n_v = 0 v - disabled. n_v = 1 v - enabled. 2g / 4g / 6g / 8g tri - axis digital accelerometer specifications part number: kxcnl - 1010 rev 3 .0 36 thornwood dr. C ithaca, ny 14850 tel: 607 - 257 - 1080 C fax:607 - 257 - 1146 www.kionix.com - info@kionix.com ? 2013 kionix C all rights reserved 1.0 page 45 of 51 /ma2 the register that controls the default settings of axis and sign masks. - /w - /w - /w - /w - /w - /w - /w - /w p_x n_x p_y n_y p_z n_z p_v n_v bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 i 2 c address: 0x 7 ah p_x is axis mask x+ . p_x = 0 x+ disabled. p_x = 1 x+ enabled. n_x is axis mask x - . n_x = 0 x - disabled. n_x = 1 x - enabled. p_y is axis mask y + . p_y = 0 y+ disabled. p_y = 1 y+ enabled. n_y is axis mask y - . n_y = 0 y - disabled. n_y = 1 y - enabled. p_z is axis mask z + . p_z = 0 z+ disabled. p_z = 1 z+ enabled. n_z is axis mask z - . n_z = 0 z - disabled. n_z = 1 z - enabled. p_v is axis mask v + . p_v = 0 v+ d isabled. p_v = 1 v+ enabled. n_v is axis mask v - . n_v = 0 v - disabled. n_v = 1 v - enabled. 2g / 4g / 6g / 8g tri - axis digital accelerometer specifications part number: kxcnl - 1010 rev 3 .0 36 thornwood dr. C ithaca, ny 14850 tel: 607 - 257 - 1080 C fax:607 - 257 - 1146 www.kionix.com - info@kionix.com ? 2013 kionix C all rights reserved 1.0 page 46 of 51 /sett2 the register that controls the state program 2 flow. - /w - /w - /w - /w - /w - /w - /w - /w p_det thr3_sa abs radi d_cs thr3_ma r_tam sitr bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 i 2 c address: 0x 7 bh p_det is the peak detection control bit. p_det = 0 peak detection disabled. p_det = 1 peak detection enabled in state program 2. thr3_sa controls the reset action when threshold 3 is exceeded and mask is /sa2. thr3_sa = 0 no action. thr3_sa = 1 exceeding threshold 3 immediately triggers reset action if mask is /sa2 (/masa2 == 1). every sample and every axis is tested to determine if it exceeds threshold 3 regardless of the /tamxa 2 value. /thrs3 (r egister) limit is common for both state programs. abs is the peak absolute threshold enable/disable control. abs = 0 unsigned thresholds. thresholds are symmetric across the zero line. abs = 1 signed thresholds in state program 2. thresholds are sign dependent. radi contr ols difference data mode. only for state program 2. radi = 0 use raw data radi = 1 use difference data in state program 2. d_cs diff2 or constant shift mode. only for state program 2. d_cs = 0 diff2 d_cs = 1 constant shift for diff definition thr3_ma controls the reset action when threshold 3 is exceeded and mask is /ma2. thr3_ma = 0 no action. thr3_ma = 1 exceeding threshold 3 immediately triggers reset action if mask is /sa2 (/masa2 == 0). every sample and every axis is tested to determine if it exceeds threshold 3 regardless of the /tamxa2 value. /thrs3 (register) limit is common for both state programs. r_tam is the temporary axis mask and peak state flag release. r_tam = 0 no changes for /tamxa2. r_tam = 1 /ta mxa2 released to default after every valid next condition. sitr is the temporary axis mask and peak state flag release. sitr = 0 no actions. sitr = 1 stop and cont commands proceeds also output as outc command. 2g / 4g / 6g / 8g tri - axis digital accelerometer specifications part number: kxcnl - 1010 rev 3 .0 36 thornwood dr. C ithaca, ny 14850 tel: 607 - 257 - 1080 C fax:607 - 257 - 1146 www.kionix.com - info@kionix.com ? 2013 kionix C all rights reserved 1.0 page 47 of 51 /pr2 the register contains the program pointer (pp2) address and the reset point (rp2) address. the i nternal addres ses for program flow management are reported in an unsigned 4 b +4b valu e. /pr 2_pp2 is the lsb part of byte (/pp2) and /pr2_rp2 is the msb part of byte ( /rp 2 ) r r r r r r r r rp2_3 rp2_2 rp2_1 rp2_0 pp2_3 pp2_2 pp2_1 pp2_0 reset value bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 00000000 i 2 c address: 0x 7 ch /tc2_l current timer counter value (unsigned) least significant byte r r r r r r r r tc2_7 tc2_6 tc2_5 tc2_4 tc2_3 tc2_2 tc2_1 tc2_0 reset value bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 00000000 i 2 c address: 0x 7 dh /tc2_h current timer counter value (unsigned) most significant byte r r r r r r r r tc2_15 tc2_14 tc2_13 tc2_12 tc2_11 tc2_10 tc2_9 tc2_8 reset value bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 00000000 i 2 c address: 0x 7 eh /outs2 the output register containing the main set flags. reading this register affects the interrupt release function. this register is set to default after the host reads this register. r r r r r r r r p_x n_x p_y n_y p_z n_z p_v n_v reset value bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 00000000 i 2 c address: 0x 7 fh p_x is axis mask x+ . p_x = 0 x+ no show. p_x = 1 x+ show. n_x is axis mask x - . n_x = 0 x - no show. n_x = 1 x - show. p_y is axis mask y + . 2g / 4g / 6g / 8g tri - axis digital accelerometer specifications part number: kxcnl - 1010 rev 3 .0 36 thornwood dr. C ithaca, ny 14850 tel: 607 - 257 - 1080 C fax:607 - 257 - 1146 www.kionix.com - info@kionix.com ? 2013 kionix C all rights reserved 1.0 page 48 of 51 p_y = 0 y+ no show. p_y = 1 y+ show. n_y is axis mask y - . n_y = 0 y - no show. n_y = 1 y - show. p_z is axis mask z + . p_z = 0 z+ no show. p_z = 1 z+ show. n_z is axis mask z - . n_z = 0 z - no show. n_z = 1 z - show. p_v is axis mask v + . p_v = 0 v+ no show. p_v = 1 v+ show. n_v is axis mask v - . n_v = 0 v - no show. n_v = 1 v - show. 2g / 4g / 6g / 8g tri - axis digital accelerometer specifications part number: kxcnl - 1010 rev 3 .0 36 thornwood dr. C ithaca, ny 14850 tel: 607 - 257 - 1080 C fax:607 - 257 - 1146 www.kionix.com - info@kionix.com ? 2013 kionix C all rights reserved 1.0 page 49 of 51 state program op codes # mnemonic explanation notes 0h nop no operation execution moved to next or resetconditions in state 1h ti1 timer 1 valid data samples are not evaluated 2h ti2 timer 2 valid data samples are not evaluated 3h ti3 timer 3 valid data samples are not evaluated 4h ti4 timer 4 valid data samples are not evaluated 5h gnth1 any/triggered axis greater than threshold 1 first axis triggers 6h gnth2 any/triggered axis greater than threshold 2 first axis triggers 7h lnth1 any/triggered axis less than or equal to threshold 1 first axis triggers 8h lnth2 any/triggered axis less than or equal to threshold 2 first axis triggers 9h gtth1 any/triggered axis greater than threshold 1 first axis triggers ah llth2 all axis less than or equal to threshold 2 first masked axis triggers bh grth1 any/triggered axis greater than to reversed threshold 1 first axis triggers ch lrth1 any/triggered axis less than or equal to reversed threshold 1 first axis triggers dh grth2 any/triggered axis greater than to reversed threshold 2 first axis triggers eh lrth2 any/triggered axis less than or equal to reversed threshold 2 first axis triggers fh nzero any axis zero crossed uses previous data samples sign first axis triggers table 1 . conditions # mnemonic explanation run scope notes 00h stop stop execution, and resets reset - point to start immediately output also if enabled 11h cont continues execution from reset - point immediately output also if enabled 22h jmp jump address for two next conditions - 1 st parameter is conditions - 2 nd parameter are addresses for valid conditions immediately for command & sample for conditions special (command and conditions) 33h srp set reset - point to next address / state immediately 44h crp clear reset - point to start position (to 1 st address) immediately 55h setp set parameter in register memory - 1 st is address of parameter - 2 nd parameter is new parameter set to address immediately address parameter is direct absolute pointer to register memory 66h sets1 set new setting to settings 1 register - 1 st is new settings byte immediately 77h sthr1 set new value to /thrs1_y register - 1 st is new settings byte immediately 88h outc set outputs to output registers immediately output 2g / 4g / 6g / 8g tri - axis digital accelerometer specifications part number: kxcnl - 1010 rev 3 .0 36 thornwood dr. C ithaca, ny 14850 tel: 607 - 257 - 1080 C fax:607 - 257 - 1146 www.kionix.com - info@kionix.com ? 2013 kionix C all rights reserved 1.0 page 50 of 51 # mnemonic explanation run scope notes 99h outw set outputs to output registers and wait for latch reset from host immediately output and wait (host) host driven event a a h sthr2 set new value to /thrs2_y register - 1 st is new settings byte immediately bbh dec decrease long counter - 1 and validate counter immediately cch sisw swaps sign information to opposite in mask and trigger immediately ddh rel releases temporary output information immediately e e h sthr3 set new value to /thrs3 register - 1 st is new settings byte immediately ffh ssync set synchronization point to other state program immediately and wait (sync) affects both state programs table 2. commands # mnemonic explanation run scope notes 12h sabs0 set /setty, bit abs = 0. select unsigned filter immediately 13h sabs1 set /setty, bit abs = 1. select signed filter on immediately 14h selma set /masay pointer to m a y (set masay = 0) immediately 21h sradi0 set /sett2, bit radi = 0. select raw data mode immediately only for state program 2 * 23h sradi1 set /sett2, bit radi = 1. select difference data mode immediately only for state program 2 * 24h selsa set /masay pointer to s a y (set masay = 1) immediately 31h scs0 set /sett2, bit d_cs = 0. select diff data mode immediately only for state program 2 * 32h scs1 set /sett2, bit d_cs = 1. select constant shift data mode immediately only for state program 2 * 34h stram0 set /setty, bit r_tam = 0. temporary axis mask /tamxay is kept intact immediately 41h stim3 set new value to /tim3_y register - 1 st is new settings byte immediately 42h stim4 set new value to /tim4 _y register - 1 st is new settings byte immediately 43h srtam1 set /setty, bit r_tam = 1. temporary axis mask /tamxay is released to default after every valid condition immediately table 3. commands (extended set) * note: 21h , 23h, 31h, and 32h are f orbidden with state program 1 . when a forbidden op code exist s in state program y, it will immediately stop/halt (f_s m y_em = 0) . 2g / 4g / 6g / 8g tri - axis digital accelerometer specifications part number: kxcnl - 1010 rev 3 .0 36 thornwood dr. C ithaca, ny 14850 tel: 607 - 257 - 1080 C fax:607 - 257 - 1146 www.kionix.com - info@kionix.com ? 2013 kionix C all rights reserved 1.0 page 51 of 51 revision history revision description date 1.0 initial release 21 - aug - 2012 2.0 updated /sett2 register to include radi and d_cs bits 8 - oct - 2012 3.0 added floor life specification 19 - nov - 2013 "kionix" is a registered trademark of kionix, inc. products described herein are protected by patents issued or pending. no license is granted by implication or otherwise under any patent or other rights of kionix. the information contained herein is be lieved to be accurate and reliable but is not guaranteed. kionix does not assume responsibility for its use or distribution. kionix also reserves the right to change product specifications or discon tinue this product at any time without prior notice. t his publication supersedes and replaces all information previously supplied. |
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