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notes through are on page 2 applicable directfet outline and substrate outline (see p. 6, 7 for details) description this digital audio mosfet is specifically designed for class-d audio amplifier applications. this mosfet utilizes the latest processing techniques to achieve low on-resistance per silicon area. furthermore, gate charge, body-diode reverse recovery and internal gate resistance are optimized to improve key class-d audio amplifier performance factors such as efficiency, thd, and emi. the IRF6775MPBF device utilizes directfet tm packaging technology. directfet tm packaging technology offers lower parasitic inductance and resistance when compared to conventional wirebonded soic packaging. lower inductance improves emi performance by reducing the voltage ringing that accompanies fast current transients. the directfet tm package is compatible with existing layout geometries used in power applications, pcb assembly equipment and vapor phase, infra-red or convection soldering techniques, when application note an-1035 is followed regarding the manufacturing method and processes. the directfet tm package also allows dual sided cooling to maximize thermal transfer in power systems, improving thermal resis- tance and power dissipation. these features combine to make this mosfet a highly efficient, robust and reliable device for class-d audio amplifier applications. features ? latest mosfet silicon technology ? key parameters optimized for class-d audio amplifier applications ? low r ds(on) for improved efficiency ? low q g for better thd and improved efficiency ? low q rr for better thd and lower emi ? low package stray inductance for reduced ringing and lower emi ? can deliver up to 250w per channel into 4 load in half-bridge configuration amplifier ? dual sided cooling compatible compatible with existing surface mount technologies rohs compliant containing no lead or bromide lead-free (qualified up to 260c reflow) directfet isometric sq sx st sh mq mx mt mn mz v ds 150 v r ds(on) typ. @ v gs = 10v 47 m q g typ. 25.0 nc r g(int) max. 3.0 key parameters absolute maximum ratings parameter units v ds drain-to-source voltage v v gs gate-to-source voltage i d @ t c = 25c continuous drain current, v gs @ 10v i d @ t a = 25c continuous drain current, v gs @ 10v a i d @ t a = 70c continuous drain current, v gs @ 10v i dm pulsed drain current p d @t c = 25c maximum power dissipation w p d @t a = 25c power dissipation p d @t a = 70c power dissipation e as single pulse avalanche energy mj i ar avalanche current a linear derating factor w/c t j operating junction and c t stg storage temperature range thermal resistance parameter typ. max. units r ja junction-to-ambient ??? 45 c/w r ja junction-to-ambient 12.5 ??? r ja junction-to-ambient 20 ??? r jc junction-to-case ??? 1.4 r j-pcb junction-to-pcb mounted 1.4 ??? 89 max. 4.9 3.9 39 150 20 28 -40 to + 150 0.022 2.8 1.8 33 5.6

s d g repetitive rating; pulse width limited by max. junction temperature. starting t j = 25c, l = 0.53mh, r g = 25 , i as = 11.2a. surface mounted on 1 in. square cu board. pulse width 400 s; duty cycle 2%. c oss eff. is a fixed capacitance that gives the same charging time as c oss while v ds is rising from 0 to 80% v dss . used double sided cooling , mounting pad with large heatsink. mounted on minimum footprint full size board with metalized back and with small clip heatsink.
t c measured with thermal couple mounted to top (drain) of part. r is measured at t j of approximately 90c. static @ t j = 25c (unless otherwise specified) parameter min. typ. max. units v (br)dss drain-to-source breakdown voltage 150 ??? ??? v v (br)dss / t j breakdown voltage temp. coefficient ??? 0.17 ??? v/c r ds(on) static drain-to-source on-resistance ??? 47 56 m v gs(th) gate threshold voltage 3.0 ??? 5.0 v i dss drain-to-source leakage current ??? ??? 20 a ??? ??? 250 i gss gate-to-source forward leakage ??? ??? 100 na gate-to-source reverse leakage ??? ??? -100 r g(int) internal gate resistance ??? ??? 3.0 dynamic @ t j = 25c (unless otherwise specified) parameter min. typ. max. units gfs forward transconductance 11 ??? ??? s q g total gate charge ??? 25 36 v ds = 75v q gs1 pre-vth gate-to-source charge ??? 5.8 ??? v gs = 10v q gs2 post-vth gate-to-source charge ??? 1.4 ??? i d = 5.6a q gd gate-to-drain charge ??? 6.6 ??? nc see fig. 6 and 17 q godr gate charge overdrive ??? 11 ??? q sw switch charge (q gs2 + q gd ) ??? 8.0 ??? t d(on) turn-on delay time ??? 5.9 ??? t r rise time ??? 7.8 ??? t d(off) turn-off delay time ??? 5.8 ??? ns t f fall time ???15??? c iss input capacitance ??? 1411 ??? c oss output capacitance ??? 193 ??? c rss reverse transfer capacitance ??? 40 ??? pf c oss output capacitance ??? 1557 ??? c oss output capacitance ??? 93 ??? c oss eff. effective output capacitance ??? 175 ??? diode characteristics parameter min. typ. max. units i s continuous source current ??? ??? 28 (body diode) a i sm pulsed source current ??? ??? 39 (body diode) v sd diode forward voltage ??? ??? 1.3 v t rr reverse recovery time ??? 62 ??? ns q rr reverse recovery charge ??? 164 ??? nc v dd = 75v i d = 5.6a r g = 6.0 v gs = 20v v gs = -20v conditions v ds = 50v, i d = 5.6a t j = 25c, i s = 5.6a, v gs = 0v t j = 25c, i f = 5.6a, v dd = 25v di/dt = 100a/ s conditions v gs = 0v, i d = 250 a reference to 25c, i d = 1ma v gs = 10v, i d = 5.6a v ds = v gs , i d = 100 a v ds = 150v, v gs = 0v v ds = 120v, v gs = 0v, t j = 125c mosfet symbol showing the integral reverse p-n junction diode. conditions v gs = 10v v gs = 0v v ds = 25v ? = 1.0mhz v gs = 0v, v ds = 0v to 120v v gs = 0v, v ds = 1.0v, ? = 1.0mhz v gs = 0v, v ds = 120v, ? = 1.0mhz

fig 2. typical output characteristics fig 1. typical output characteristics fig 3. typical transfer characteristics fig 4. normalized on-resistance vs. temperature fig 6. typical gate charge vs.gate-to-source voltage fig 5. typical capacitance vs.drain-to-source voltage 0 10203040 q g total gate charge (nc) 0 4 8 12 16 20 v g s , g a t e - t o - s o u r c e v o l t a g e ( v ) v ds = 120v vds= 75v vds= 30v i d = 5.6a 0.1 1 10 100 v ds , drain-to-source voltage (v) 1 10 100 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 60 s pulse width tj = 25c 5.5v vgs top 15v 10v 9.0v 8.0v 7.0v 6.5v 6.0v bottom 5.5v 0.1 1 10 100 v ds , drain-to-source voltage (v) 1 10 100 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 60 s pulse width tj = 150c 5.5v vgs top 15v 10v 9.0v 8.0v 7.0v 6.5v 6.0v bottom 5.5v 3.0 4.0 5.0 6.0 7.0 8.0 v gs , gate-to-source voltage (v) 0.01 0.1 1 10 100 i d , d r a i n - t o - s o u r c e c u r r e n t ( ) v ds = 25v 60 s pulse width t j = 150c t j = 25c t j = -40c -60 -40 -20 0 20 40 60 80 100 120 140 160 t j , junction temperature (c) 0.5 1.0 1.5 2.0 2.5 r d s ( o n ) , d r a i n - t o - s o u r c e o n r e s i s t a n c e ( n o r m a l i z e d ) i d = 5.6a v gs = 10v 1 10 100 1000 v ds , drain-to-source voltage (v) 10 100 1000 10000 100000 c , c a p a c i t a n c e ( p f ) coss crss ciss v gs = 0v, f = 1 mhz c iss = c gs + c gd , c ds shorted c rss = c gd c oss = c ds + c gd

fig 11. maximum effective transient thermal impedance, junction-to-ambient fig 10. threshold voltage vs. temperature fig 9. maximum drain current vs. case temperature fig 7. typical source-drain diode forward voltage fig 8. maximum safe operating area 0.0 0.5 1.0 1.5 v sd , source-to-drain voltage (v) 0.1 1 10 100 i s d , r e v e r s e d r a i n c u r r e n t ( a ) v gs = 0v t j = 150c t j = 25c t j = -40c -75 -50 -25 0 25 50 75 100 125 150 t j , temperature ( c ) 2.0 2.5 3.0 3.5 4.0 4.5 5.0 v g s ( t h ) g a t e t h r e s h o l d v o l t a g e ( v ) i d = 100 a i d = 250 a 1e-006 1e-005 0.0001 0.001 0.01 0.1 1 10 100 t 1 , rectangular pulse duration (sec) 0.001 0.01 0.1 1 10 100 t h e r m a l r e s p o n s e ( z t h j a ) 0.20 0.10 d = 0.50 0.02 0.01 0.05 single pulse ( thermal response ) notes : 1. duty factor d = t1/t2 2. peak tj = p dm x zthja + tc ri (c/w) i (sec) 1.2801 0.000322 8.7256 0.164798 21.750 2.25760 13.251 69 j j 1 1 2 2 3 3 r 1 r 1 r 2 r 2 r 3 r 3 ci= i / ri ci= i / ri a a 4 4 r 4 r 4 25 50 75 100 125 150 t c , casetemperature (c) 0 5 10 15 20 25 30 i d , d r a i n c u r r e n t ( a ) 0.1 1 10 100 1000 v ds , drain-to-source voltage (v) 0.1 1 10 100 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) tc = 25c tj = 150c single pulse 1msec 10msec operation in this area limited by r ds (on) 100 sec dc

fig 14. maximum avalanche energy vs. drain current fig 16a. switching time test circuit fig 16b. switching time waveforms v gs v ds 90% 10% t d(on) t d(off) t r t f fig 15b. unclamped inductive waveforms fig 15a. unclamped inductive test circuit t p v (br)dss i as r g i as 0.01 t p d.u.t l v ds + - v dd driver a 15v 20v v gs fig 12. on-resistance vs. gate voltage fig 13. on-resistance vs. drain current
1 0.1 %
+ - 4 6 8 10 12 14 16 v gs , gate-to-source voltage (v) 40 60 80 100 120 140 r d s ( o n ) , d r a i n - t o - s o u r c e o n r e s i s t a n c e ( m ) t j = 25c t j = 125c i d = 5.6a 0 5 10 15 20 i d , drain current (a) 40 50 60 70 80 90 100 r d s ( o n ) , d r a i n - t o - s o u r c e o n r e s i s t a n c e ( m ) v gs = 10v t j = 125c t j = 25c 25 50 75 100 125 150 starting t j , junction temperature (c) 0 20 40 60 80 100 120 140 e a s , s i n g l e p u l s e a v a l a n c h e e n e r g y ( m j ) i d top 1.1a 1.4a bottom 11a

fig 17a. gate charge test circuit fig 17b. gate charge waveform vds vgs id vgs(th) qgs1 qgs2 qgd qgodr 1k vcc dut 0 l s 20k fig 18. for hexfet power mosfets ? ? ? p.w. period di/dt diode recovery dv/dt ripple 5% body diode forward drop re-applied voltage reverse recovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t. i sd waveform d.u.t. v ds waveform inductor curent d = p. w . period + - + + + - - - ? !" # $ ? ! % &'&& ? # (( ? &'&& ) ! '
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directfet ? substrate and pcb layout, mz outline (
). please see directfet application note an-1035 for all details regarding pcb assembly using directfet. this includes all recommendations for stencil and substrate designs. note: for the most current drawing please refer to ir website at: http://www.irf.com/package/

please see directfet application note an-1035 for all details regarding pcb assembly using directfet. this includes all recommendations for stencil and substrate designs. ! max 0.250 0.201 0.156 0.018 0.028 0.028 0.038 0.026 0.013 0.050 0.105 0.0274 0.0031 0.007 max 0.246 0.189 0.152 0.014 0.027 0.027 0.037 0.025 0.011 0.044 0.100 0.0235 0.0008 0.003 imperial code a b c d e f g h j k l m r p max 6.35 5.05 3.95 0.45 0.72 0.72 0.97 0.67 0.32 1.26 2.66 0.676 0.080 0.17 min 6.25 4.80 3.85 0.35 0.68 0.68 0.93 0.63 0.28 1.13 2.53 0.616 0.020 0.08 metric dimensions logo gate marking batch number part number date code line above the last character of the date code indicates "lead-free" note: for the most current drawing please refer to ir website at: http://www.irf.com/package/

directfet tape & reel dimension (showing component orientation). loaded tape feed direction min 7.90 3.90 11.90 5.45 5.10 6.50 1.50 1.50 note: controlling dimensions in mm code a b c d e f g h max 8.10 4.10 12.30 5.55 5.30 6.70 n.c 1.60 min 0.311 0.154 0.469 0.215 0.201 0.256 0.059 0.059 max 0.319 0.161 0.484 0.219 0.209 0.264 n.c 0.063 dimensions metric imperial reel dimensions note: controlling dimensions in mm std reel quantity is 4800 parts. (ordered as irf6775trpbf). for 1000 parts on 7" reel, order irf6775tr1pbf standard option (qty 4800) min 330.0 20.2 12.8 1.5 100.0 n.c 12.4 11.9 code a b c d e f g h max n.c n.c 13.2 n.c n.c 18.4 14.4 15.4 min 12.992 0.795 0.504 0.059 3.937 n.c 0.488 0.469 max n.c n.c 0.520 n.c n.c 0.724 0.567 0.606 metric imperial tr1 option (qty 1000) imperial min 6.9 0.75 0.53 0.059 2.31 n.c 0.47 0.47 max n.c n.c 12.8 n.c n.c 13.50 12.01 12.01 min 177.77 19.06 13.5 1.5 58.72 n.c 11.9 11.9 metric max n.c n.c 0.50 n.c n.c 0.53 n.c n.c note: for the most current drawing please refer to ir website at: http://www.irf.com/package/

data and specifications subject to change without notice. this product has been designed and qualified for the consumer market. qualification standards can be found on ir?s web site.

! !"!!# ! $$! %!! &''((( )'(%!* ' date comments ? updated soa curve figure 8 to extend x axis to 150v because this device is 150v, on page 4. ? . revision history 2/26/2014

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