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october 2018 www.onsemi.com ? 2018 semiconductor components industries, llc fusb302t ? rev. 2 fusb302 t programmable usb type - c controller w/pd fusb302t programmable usb type- c controller w/pd features ? dual-role functionality with autonomous drp t oggle ? ability to connect as either a host or a device based on what has been attached. ? software configurable either as a dedicated host, dedicated device, or dual role. - dedicated devices can operate both on a type- c receptacle or a type-c plug with a fixed cc and vconn channel. ? full type-c 1. 2 support. integrates the following functionality of the cc pin - attach/detach detection as host - current capability indication as host - current capability detection as device - audio adapter accessory mode - debug accessory mode - active cable detection ? integrates ccx to vconn switch with over-current limiting for powering usb3.1 full featured cables. ? usb power delivery (pd) 2.0 support - automatic goodcrc packet response - automatic retries of sending a packet if a goodcrc is not received - automatic soft reset packet sent with retries if needed - automatic hard reset ordered set sent ? default cc open for src application. ? l ow power operation: i cc = 25 a (typical) ? packaged in : - 14 -lead mlp (2.5 mm x 2.5 mm, 0.5 mm pitch) description the fusb302t targets system designers looking to implement usb type-c wall charger or travel adaptor . in addition to the default src function, the device supports drp/ src/ snk with low amount of programmability. the fusb302t enables the usb type-c detection including attach/detach , and orientation. the fusb302t integrates the physical layer of the usb bmc power delivery protocol to allow up to 100 w of power and role swap. the bmc pd block enables full support for alternative interfaces of the type-c specification. applications ? charging/wall adaptors ? cigarette jack in cars ? laptops ? notebooks ? power adapte rs ? cameras ? dongles figure 1. block diagram ordering information part number operating temperature range package packing method fusb302t mpx -40 to 85c 14 - lead mlp 2.5 mm x 2.5 mm, 0.5 mm pitch tape and reel fusb302t
2 fusb302 t programmable usb type - c controller w/pd typical application figure 2. typical application block diagram figure 3. functional block diagram bmc physical layer vconn cc1 fifo fifo code/ control logic bmc driver cdr int_n sda scl processor (software) type-c connection states : - source - sink - sink with accessory support - dual-role port - dual-role port with accessory support pd (provider/consumer) crc32 tx crc32 rx 4b5b 4b5b device policy manager policy engine protocol type-c pd/ vdm vbus r d bmc bmc fusb302t i 2 c reg switch settings comp. status control settings pd status pd configuration fifo access r d cc2 dac
3 fusb302 t programmable usb type - c controller w/pd pin configuration figure 4. FUSB302TMPX pin assignment (n /c = no connect) pin descriptions name type description usb type - c connector interface cc1/cc2 i/o type - c connector configuration channel (cc) pins. initially used to determine when an attach has occurred and what the orientation of the insertion is. functionality after attach depends on mode of operation detected. operating as a host: 1. sets the allowable charging current for vbus to be sensed by the attached device 2. used to communicate with devices using usb bmc power delivery 3. used to detect when a deta ch has occurred operating as a device: 1. indicates what the allowable sink current is from the attached host. - used to communicate with devices using usb bmc power delivery gnd ground ground vbus input vbus input pin for attach and detach detection when operating as an upstream faci ng port (device). expected to be an ovp protected input. power interface vdd power input supply voltage. vconn power switch regulated input to be switched to correct cc pin as vconn to power usb3.1 full - featured cables and other accessories signal interface scl input i 2 c serial clock signal to be connected to the phone - based i 2 c master. sda open - drain i/o i 2 c serial data signal to be connected to the phone - based i 2 c master int_n open - drain output active low open drain interrupt output used to prompt the processor to read the i 2 c register bits
4 fusb302 t programmable usb type - c controller w/pd configuration channel switch the fusb302t integrates the control and detection functionality required to implement a usb type-c host, device or dual-role port including: ? device port pull-down(r d ) ? host port pull-up (i p ) ? vconn power switch with ocp for full-featured usb3.1 cables ? usb bmc power delivery physical layer ? configuration channel (cc) threshold comparators. each cc pin contains a flexible switch matrix that allows the host software to control what type of type-c port is implemented. the switches are shown in figure 5 . figure 5. configuration channel switch functionality type-c detection the fusb302t implements multiple comparators and a programmable dac that can be used by software to determine the state of the cc and vbus pins . this status information provides the processor all of the information required to determine attach, detach and charging current configuration of the type-c port connection. the fusb302t has three fixed threshold comparators that match the usb type-c specification for the three charging current levels that can be detected by a type- c device. these comparators automatically cause bc_lvl and comp interrupts to occur when there is a change of state. in addition to the fixed threshold comparators, the host software can use the 6-bit dac to determine the state of the cc lines more accurately. the fusb302t also has a fixed comparator that monitors if vbus has reached a valid threshold or not. the dac can be used to measure vbus up to 20 v which allows the software to confirm that changes to the vbus line have occurred as expected based on pd or other communication methods to change the charging level. default float on cc with or without vdd, the default cc status of fusb302t is float/open, which is different from fusb302b. the fusb302t is suitable for charger (wall) adaptor application which needs source only mode and shouldn ? t be seen as sink mode even with no power on the device. the fusb302t, however, can be set to sink mode, which has rd (pull-down) on cc x by software program. detection through autonomous device toggle the fusb302t has the capability to do autonomous drp toggle. in autonomous toggle the fusb302t internally controls the pdwn1, pdwn2, pu_en1 and pu_en2, meas_cc1 and meas_cc2 and implements a fixed drp toggle between presenting as a src and presenting as a snk. alternately, it can present as a src or snk only and poll cc1 and cc2 continuously. bmc i/o dac/ comparator pwdnx reg vconn_ccx reg current source pull-ups meas_ccx reg txccx reg pu_enx reg 5.1k vconn_switch vconn meas_cc_switch tx_bmc_switch pullup_switch pulldown_switch cc x
5 fusb302 t programmable usb type - c controller w/pd table 1. pr ocessor configures the fusb302t through i 2 c: i 2 c registers / bits value toggle 1 pwr 07h host_cur0 1 host_cur1 0 meas_vbus 0 vconn_cc1 0 vconn_cc2 0 mask register 0xfe maska register 0x bf maskb register (except i_togdone and i_bc_lvl interrupt) 0x01 pwr[3:0] 0x 0 7 notes: 1. once it has been determined what the role is of the fusb302t, it returns i_togdone and togss1/2. 2. processor then can perform a final manual check through i2c. manual device toggle the fusb302t has the capability to do manual drp toggle. in manual toggle the fusb302t is configurable by the processor software by i2c and setting toggle = 0. manual device detection and configuration a type-c device must monitor vbus to determine if it is detached. the fusb302t provides this information through the vbusok interrupt. after the type-c device knows that a type-c host/device has been attached, it needs to determine what type of termination is applied to each cc pin. the software determines if an ra or rd termination is present based on the bc_lvl and comp interrupt and status bits. additionally, for rd terminations, the software can further determine what charging current is allowed by the type-c host by reading the bc_lvl status bits. this is summarized in table 2 . toggle functionality when toggle bit (control2 register) is set the fusb302t implements a fixed drp toggle between presenting as a src and as a snk. it can also be configured to present as a src only or snk only and poll cc1 and cc2 continuously. this operation is turned on with toggle=1 and the processor should initially write host_cur1=0, host_cur0=1 (for default current), vconn_cc1=vconn_cc2=0, mask register=0xfe, maska register=0xbf, and mask b register=0x01, and pwr=0x01. the processor should also read the interrupt register to clear them prior to setting the toggle bit. table 2. device interrupt summary status type interrupt status meaning bc_lvl[1:0] comp comp setting vbusok cc detection 2'b00 na na 1 vra 2'b01 na na 1 vrd - connect and vrd - usb 2'b10 na na 1 vrd - connect and vrd - 1.5 2'b11 0 6'b11_0100 (2.05 v) 1 vrd - connect and vrd - 3.0 attach na na na 1 host attached, vbus valid detach na na na 0 host detached , vbus invalid
6 fusb302 t programmable usb type - c controller w/pd manual host detection and configuration when the fusb302t is configured as a type- c host, the software can use the status of the comparators and dac to determine when a type- c device has been attached or detached and what termination type has been attached to each cc pin. the fusb302t allows the host software to change the charging current capabilities of the port through the host_cur control bits. if the host_cur bits are changed prior to attach, the fusb302t automatically indicates the programmed current capability when a device is attached. if the current capabilities are changed after a device is attached, the fusb302t immediately changes the cc line to the programmed capability. figure 6. host_cur changed after attach figure 7. host_cur changed prior to attach the type-c specification outlines different attach and detach thresholds for a type-c host that are based on how much current is supplied to each cc pin. based on the programmed host_cur setting, the software adjusts the dac comparator threshold to match the type-c specification requirements. the bc_lvl comparators can also be used as part of the ra detection flow. this is summarized in table 3 . table 3. host interrupt summary termination host_cur[1:0] interrupt status attach/detach bc_lvl[1:0] comp comp setting ra 2'b01 2'b00 na na na 2'b10 2'b01 0 6'b00_1010 (0.42 v) 2'b11 2'b10 0 6'b01_0011 (0.8 v) rd 2'b01, 2'b10 na 0 6'b10_0110 (1.6 v) attach na 1 6'b10_0110 (1.6 v) detach 2'b11 na 0 6'b11_1110 (2.6 v) attach na 1 6'b11_1110 (2.6 v) detach cc host_cur[1:0] = default high current setting med current setting 0v attach cc high current setting med current setting 0v attach default current
7 fusb302 t programmable usb type - c controller w/pd the high level software flow diagram for a type-c host (src) is shown below in figure 8 . figure 8. src software flow disabled: fusb302t in low power mode looking for an attach unattached.dfp: host software enables fusb302t pull-ups and measure block to detect attach fusb302t i_wake interrupt alerts host software that something has attached. attached.dfp host software configures fusb302t based on insertion orientation and enables vbus and vconn audioaccessory debugaccessory host software utilizes i_comp and i_bc_lvl interrupts to determine an attach and what type of port is attached. fusb302t i_comp and i_vbusok interrupts alert host software when accessory detach has occurred
8 fusb302 t programmable usb type - c controller w/pd manual dual-role detection and configuration the type-c specification allows ports to be both a device and a host depending on what type of port has attached. this functionality is similar to usb otg ports with the current usb connectors and is called a dual- role port. the fusb302t can be used to implement a dual -role port. a type-c dual role port toggles between presenting as a ty pe -c device and a type-c host. the host software controls the toggle time and configuration of the fusb302t in each state as shown in figure 9 . figure 9. drp software flow bmc power delivery the type-c connector allows usb power delivery (pd) to be communicated over the connected cc pin between two ports . the communication method is t he bmc power delivery protocol and is used for many different reasons with the type-c connector. possible uses are outlined below. ? negotiating and controlling charging power levels ? alternative interfaces such as mhl, display port ? vendor specific interfaces for use with custom docks or accessories ? role swap for dual-role ports that want to switch who is the host or device ? communication with usb3.1 full featured cables the fusb302t integrates a thin bmc pd client which includes the bmc physical layer and packet fifos ( 48 bytes for transmit and 80 bytes for receive) which allows packets to be sent and received by the host software through i2c accesses. the fusb302t allows host software to implement all features of usb bmc pd through writes and reads of the fifo and control of the fusb302t physical interface. the fusb302t uses tokens to control the transmission of bmc pd packets. these tokens are written to the transmit fifo and control how the packet is transmitted on the cc pin. the tokens are designed to be flexible and support all aspects of the usb pd specification . the fusb302t additionally enables control of the bmc transmitter through tokens. the transmitter can be enabled or disabled by specific token writes which allow faster packet processing by burst writing the fifo with all the information required to transmit a packet. the fusb302t receiver stores the received data and the received crc in the receive fifo when a valid packet is received on the cc pin. the bmc receiver automatically enables the internal oscillator when an activity is sensed on the cc pin and load to the fifo when a packet is received. the i_activity and i_crc_chk interrupts alert the host software that a valid packet was received. disabled: fusb302t in low power mode looking for an attach unattached.ufp: host software enables fusb302t pull-downs and measure block to detect attach fusb302t i_wake interrupt alerts host software that something has attached. attached.ufp host software uses fusb302t comparators and dac to determine attach orientation and port type fusb302t i_vbusok interrupt alerts host software that an attach has occurred fusb302t i_vbusok interrupt alerts host software that a detach has occurred host software enables fusb302t low power disabled state unattached.dfp: host software enables fusb302t pull-ups and measure block to detect attach attached.dfp host software configures fusb302t based on insertion orientation and enables vbus and vconn host software toggle expires host software utilizes i_comp and i_bc_lvl interrupts to determine an attach fusb302t i_comp interrupt alerts host software that a detach has occurred
9 fusb302 t programmable usb type - c controller w/pd figure 10. usb bmc power delivery blocks power level determination the type-c specification outlines the order o f precedence for power level determination which covers power levels from basic usb2.0 levels to the highest levels of usb pd. the host software is expected to follow the usb type-c specification for charging current priority based on feedback from the fusb302t detection, external bc1.2 detection and any usb power delivery communication. the fusb302t does not integrate bc1.2 charger detection which is assumed available in the usb transceiver or usb charger in the system. power up, initialization and reset when power is first applied through vdd, the fusb302t is reset and registers are initialized to the default values shown in the register map . the fusb302t can be reset through software by programming the sw_res bit in the reset register. if no power applied to vdd then the src can recognize the fusb302t as a snk. pd automatic receive goodcrc the power delivery packets require a goodcrc acknowledge packet to be sent for each received packet where the calculated crc is the correct value. this calculation is done by the fusb302t and triggers the i_crc_chk interrupt if the crc is good. if the auto_crc (switches1 register bit) is set and auto_pre=0, then the fusb302t will automatically send the goodcrc control packet in response to alleviate the local processor from responding quickly to the received packet. if goodcrc is required fo r anything beyond sop, then enable sop*. pd send the fusb302t implements part of the pd protocol layer for sending packets in an autonomous fashion. pd automatic sending retries if goodcrc packet is not received and auto_retry is set, then a retry of the same message that was in the txfifo written by the processor is executed within tretry and that is repeated for nretry times. pd send soft reset if the correct goodcrc packet is still not received for all retries then i_retryfail interrupt is triggered and if auto_soft_reset is set, then a soft reset packet is created (messageid is set to 0 and the processor upon servicing i_retryfail would set the true messageidcounter to 0. if this soft reset is sent successfully where a goodcrc control packet is received with a messageid=0 then i_txsent interrupt occurs. if not, this soft reset packet is retried nretries times (messageid is always 0 for all retries) if a goodcrc acknowledge packet is not received with crcreceivetimer expiring (treceive of 1.1 ms max). if all retries fail, then i_softfail interrupt is triggered. pd send hard reset if all retries of the soft reset packet fail and if auto_hard_reset is set, then a hard reset ordered set is sent by loading up the txfifo with reset1, reset1, reset1, reset2 and sending a hard reset. note only one hard reset is sent since the typical retry mechanism doesn?t apply. the processor?s policy engine firmware is responsible for retrying the hard reset if it doesn?t receive the required response. hard reset soft reset automatic sending retries pd packet sent fifo fifo code/ control logic bmc driver cdr crc32 tx crc32 rx 4b5b 4b5b bmc bmc cc1 cc2
10 fusb302 t programmable usb type - c controller w/pd flush rx-fifo with built-in self test (bist) test data. during pd compliance test ing , bist test packets are used to test physical layer of the pd interface such as, frequency derivation, amplitude measure and etc. the one bist test data packet has 7 data objects (28byte data), header and crc , but the message id doesn ? t change, the packet should be ignored and not acted on by the pd policy engine. the pd protocol layer does need to send a goodcrc message back after every packet. the bist data can arrive continuously from a tester, which could cause the fusb302t rx fifo to overflow and the pd protocol layer to stop sending goodcrc messages unless the fifo is read or cleared quickly. the fusb302t has a special register bit in the i2c registers, bit[5] of address 0x09, that when the bit is set, all the data received next will be flushed from the rxfifo automatically and the pd protocol layer will keep sending goodcrc messages back. once bist test is done, tester sends hardreset, so with the hardreset, processor has to write the bit back to disable. also, if the bit can be de-selected anytime, then the coming packet has to be managed by protocol layer and policy engine.
11 fusb302 t programmable usb type - c controller w/pd i 2 c interface the fusb302t includes a full i 2 c slave controller. the i 2 c slave fully complies with the i 2 c specification version 6 requirements. this block is designed for fast m ode plus traffic up to 1 mhz scl operation. the toggle features allow for very low power operation with slow clocking thus may not be fully compliant to the 1 mhz operation. examples of an i 2 c write and read sequence are shown in figure 11 and figure 12 respectively. figure 11. i 2 c write example figure 12. i 2 c read example s wr a a a a a a p note: single byte read is initiated by master with p immediately following first data byte 8bits 8bits 8bits write data k+2 slave address register address k write data write data k+1 write data k+n-1 s wr a a s rd a a a na p register address to read specified note: 8bits if register is not specified master will begin read from current register. in this case only sequence showing in red bracket is needed single or multi byte read executed from current register location (single byte read is initiated by master with na immediately following first data byte) read data k+1 read data k+n-1 8bits 8bits 8bits slave address register address k read data k slave address from master to slave s start condition na not acknowledge (sda high) rd read =1 from slave to master a acknowledge (sda low) wr write=0 p stop condition
12 fusb302 t programmable usb type - c controller w/pd absolute maximum ratings stresses exceeding the absolute maximum ratings may damage the device. the device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. in addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. the absolute maximum ratings are stress ratings only. symbol parameter min. max. unit vv dd supply voltage from v dd - 0.5 6.0 v v cc_hddrp cc pins when configured as host, device or dual role port - 0.5 6.0 v v vbus vbus supply v oltage - 0.5 28 .0 v t storage storage temperature range - 65 +150 c t j maximum junction temperature +150 c t l lead temperature (soldering, 10 s econds) +260 c esd human body model, ansi/esda/jedec js - 001 - 2012 all pins 4 kv charged device model, jedec jesd22 - c101 all pins 1 recommended operating conditions the recommended operating conditions table defines the conditions for actual device operation. recommended operating conditions are specified to ensure optimal performance. fairchild does not recommend exceeding them or designing to absolute maximum ratings. symbol parameter min. typ. max. unit v vbus vbus s upply v oltage 4.0 5 .0 21 .0 v v v dd vdd supply voltage 2. 7 ( 3 ) 3.3 5 .5 v v vc onn vconn supply voltage 2.7 5.5 v i vc onn vconn supply current 560 ma t a operating temperature - 40 +85 c note: 3. this is for functional operation only and not the lowest limit for all subsequent electrical specifications below. all electrical parameters have a minimum of 3.0 v operation.
13 fusb302 t programmable usb type - c controller w/pd dc and transient characteristics all typical values are at t a =25c unless otherwise specified. baseband pd symbol parameter t a = - 40 to +85c t j = - 40 to +125 c unit min. typ. max. ui unit interval 3.03 3.70 s transmitter zdriver transmitter o utput i mpedance 33 75 ? t enddrivebmc time to cease driving the line after the end of the last bit of the frame 23 s t holdlowbmc time to cease driving the line after the final high - to - low transition 1 s v oh logic high voltage 1.05 1.2 0 v v ol logic low voltage 0 75 m v t startdrive time before the start of the first bit of the preamble when the transmitter shall start driving the line - 1 1 s t rise_tx rise time 300 n s t fall_tx fall time 300 n s receiver creceiver receiver capacitance when driver isn?t turned on 50 pf zbmcrx receiver input impedance 1 m ? trxfilter rx bandwidth l imiting filter ( 4 ) 100 n s note: 4. guaranteed by characterization and/or design. not production tested. figure 13. transmitter test load
14 fusb302 t programmable usb type - c controller w/pd type-c cc switches symbol parameter t a = - 40 to +85c t j = - 40 to +125c unit min . typ . max . r sw_ccx r dson for sw1_cc1 and sw1_cc2 vconn to cc1 & cc2 0.4 1. 2 ? i sw_cc x over - current protection (ocp) limit at which vconn switch shuts off over the entire vconn voltage range ( ocpreg=0f h) 600 800 1000 ma tsoftstart time taken for the vconn swit ch to turn on during which over - current protection is disabled 1.5 ms i 80_ccx src 80 a cc current (default) host_cur1=0, host_cur0=1 64 80 96 a i 180_ccx src 180 a cc c urrent (1.5 a) host_cur1=1, host_cur0=0 166 180 194 a i 330_ccx src 330 a cc c urrent (3 a) host_cur1=1, host_cur0=1 304 330 356 a r device device p ull - down r esistance ( 5 ) 4.6 5.1 5.6 k? zopen cc resistance for disabled state 126 k? wake low wake t hreshold for cc pin src or snk low value. assumes bandgap and wake circuit turned on i.e. pwr[0]=1 0.25 v wake high wake threshold for cc pin src or snk high value. assumes bandgap and wake circuit turned on i.e. pwr[0]=1 1. 45 v v bc_lvlhys hysteresis on the ra and rd c omparators 20 mv vbc_lvl cc pin thresholds, assumes pwr=4?h7 bc=2?b00 0.15 0.20 0.25 v bc=2?b01 0.61 0.66 0.70 v bc=2?b10 1.16 1.23 1.31 v vmdacstep cc measure block mdac step size for each code in mdac[5:0] register 42 mv vmdacstepvbus measure block mdac step size for each code in mdac[5:0] register for vbus measurement 420 mv vvbusthr vbus threshold at which i_vbusok interrupt is triggered. assumes measure block on i.e. pwr[2]=1. 4.0 v ttog1 when toggle=1, time at which internal versions of pu_en1=pu_en2=0 and pwdn1=pdwn2=1 selected to present externally as a snk in the drp toggle 30 45 60 ms ttog2 when toggle=1, time at which internal versions of pu_en1=1 or pu_en2=1 and pwdn1=pdwn2=0 selected to present externally as a src in the drp toggle 20 30 40 ms t dis disable time after a full toggle (ttog1+ttog2) cycle so as to save power tog_save_pwr2:1= 00 0 m s tog_save_pwr2:1= 01 40 tog_save_pwr2:1= 10 80 tog_save_pwr2:1= 11 160 tshut temp. for vconn switch off 145 c thys temp. hysteresis for vconn switch turn on 10 c note: 5. r device minimum and maximum specifications are only guaranteed when power is applied.
15 fusb302 t programmable usb type - c controller w/pd current consumption symbol parameter v dd (v) conditions t a = - 40 to +85c t j = - 40 to +125c unit min. typ. max. idisable disabled c urrent 3.0 to 5 .5 nothing a ttached, n o i 2 c t ransactions 0.37 5 .00 a itog u nattached (standby) toggle current 3.0 to 5.5 nothing attached, toggle=1, pwr[3:0]= 1h , wake_en=0 , tog_save_pwr2:1=01 25 40 a ipd_stby _ meas bmc pd standby current 3.0 to 5.5 device attached, bmc pd active but not sending or receiving anything , pwr[3:0]=7h, 40 a usb pd specific parameters symbol parameter t a = - 40 to +85c t j = - 40 to +125c unit min . typ . max . thardreset if a soft reset message fails, a hard reset is sent after thardreset of crcreceivetimer expiring 5 ms t hardreset complete if the fusb302t cannot send a hard reset within thardresetcomplete time because of a busy line, then a i_hardfail interrupt is triggered 5 ms treceive this is the value for which the crcreceivetimer expires. the crcreceivetimer is start ed upon the last bit of the eop of the transmitted packet 0.9 1.1 ms tretry once the crcreceivetimer expires, a retry packet has to be sent out within tre try time. this time is hard to separate externally from treceive since they both happen sequentially with no visible difference in the cc output 75 s tsoftreset if a goodcrc packet is not received within treceive for nretries then a soft reset packet is sent within tsoftreset time. 5 ms ttransmit from receiving a packet, we have to send a goodcrc in response within ttransmit time. it is measured from the last bit of the eop of the received packet to the first bit sent of the preamble of the goodcrc packet 195 s
16 fusb302 t programmable usb type - c controller w/pd io specifications symbol parameter v dd (v) conditions t a = - 40 to +85c t j = - 40 to +125c unit min. typ. max. host interface pins( int_n ) v ol intn output low voltage 3.0 to 5 .5 i ol = 4 ma 0.4 v t int_mask time from global interrupt mask bit cleared to when int_n goes low 3.0 to 5 .5 50 s i 2 c interface pins C standard , fast, or fast mode plus speed mode ( sda, scl ) ( 6 ) v il i2c low - level input voltage 3.0 to 5 .5 0.51 v v ih i2c high - level input voltage 3.0 to 5 .5 1.32 v v hys hysteresis of schmitt trigger inputs 3.0 to 5 .5 94 m v i i2c input current of sda and scl pins 3.0 to 5 .5 input voltage 0.26 v to 2 .0 v - 10 10 a i ccti 2c vdd current when sda or scl is high 3.0 to 5 .5 input voltage 1.8 v - 10 10 a v ol sda low - level output voltage (open - drain) 3.0 to 5.5 i ol = 2 ma 0 0.3 5 v i olsda low - level output current (open - drain) 3.0 to 5.5 v ol sda =0.4 v 20 ma c i capacitance for each i/o pin 3.0 to 5.5 5 pf note: 6. i 2 c pull up voltage is required to be between 1.71 v and v dd .
17 fusb302 t programmable usb type - c controller w/pd i 2 c specifications fast mode plus i 2 c specification symbol parameter fast mode plus min. max. unit f scl i2c_scl clock frequency 0 1000 khz t hd;sta hold time (repeated) start condition 0. 2 6 s t low low period of i2c_scl clock 0.5 s t high high period of i2c_scl clock 0.26 s t su;sta set - up time for repeated start condition 0.26 s t hd;dat data hold time 0 s t su;dat data set - up time 50 ns t r rise time of i2c_sda and i2c_scl signals ( 7 ) 120 ns t f fall time of i2c_sda and i2c_scl signals ( 7 ) 6 120 ns t su;sto set - up time for stop condition 0.26 s t buf bus - free time between stop and start conditions ( 7 ) 0.5 s t sp pulse width of spikes that must be suppressed by the input filter 0 50 ns c b capacitive l oad for each b us l ine ( 7 ) 550 pf t vd - dat data v alid t ime for d ata from scl low to sda high or low o utput ( 7 ) 0 0.45 s t vd - ack data v alid t ime for acknowledge from scl low to sda high or low o utput ( 7 ) 0 0.45 s v nl noise m argin at the low l evel ( 7 ) 0.2 v v nh noise m argin at the high l evel ( 7 ) 0.4 v note: 7. guaranteed by characterization and/or design. not production tested .
18 fusb302 t programmable usb type - c controller w/pd figure 14. definition of timing for full-spe ed mode devices on the i 2 c bus table 4. i 2 c tm slave address name bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 FUSB302TMPX 0 1 0 0 0 1 0 r/w
19 register definitions ( 8 )(9 ) address register name type rst val bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 0x01 device id r a0 version id[3:0] product id[1:0] revision id[3:0] 0x02 switches0 r/w 00 pu_en2 pu_en1 vconn _cc2 vconn _cc1 meas_cc2 meas_cc1 pdwn2 pdwn1 0x03 switches1 r/w 20 powerrole specrev1 specrev0 datarole auto_crc txcc2 txcc1 0x04 measure r/w 31 meas_vbus mdac5 mdac4 mdac3 mdac2 mdac1 mdac0 0x05 slice r/w 60 sdac_hys1 sdac_hys2 sdac5 sdac4 sdac3 sdac2 sdac1 sdac0 0x06 control0 r/w/ c 24 tx_flush int_mask host_cur1 host_cur0 auto_pre tx_start 0x07 control1 r/w/ c 00 ensop2db ensop1db bist_mode2 rx_flush ensop2 ensop1 0x08 control2 r/w 0 2 tog_save_pw r2 tog_save_p wr1 tog_rd_only wake_en mode[1:0] toggle 0x09 control3 r/w 06 send_hard_ reset bist_tmode auto_hardr eset auto_ softreset n_retries[1:0] auto_retry 0x0a mask 1 r/w 00 m_vbusok m_activity m_comp_chng m_crc_chk m_alert m_wake m_collision m_bc_lvl 0x0b power r/w 01 pwr3 pwr2 pwr1 pwr0 0x0c reset w/c 00 pd_reset sw_res 0x0d ocpreg r/w 0f ocp_range ocp_cur2 ocp_cur1 ocp_cur0 0x 0e maska r/w 00 m_ocp_temp m_ togdone m_softfail m_retryfail m_hardsent m_txsent m_softrst m_hardrst 0x0f maskb r/w 00 m_gcrcsent 0x10 control4 r/w 00 tog _exit _aud 0x3 c status 0a r 00 softfail retryfail power3 power2 softrst hardrst 0x3 d status 1a r 00 togss3 togss2 togss1 rxsop2db rxsop1db rxsop 0x3e interrupta r/c 00 i_ocp_temp i_ togdone i_softfail i_retryfail i_hardsent i_txsent i_softrst i_hardrst 0x3f interruptb r/c 00 i_gcrcsent 0x40 status0 r 00 vbusok activity comp crc_chk alert wake bc_lvl1 bc_lvl0 0x41 status1 r 28 rxsop2 rxsop1 rx_empty rx_full tx_empty tx_full ovrtemp ocp 0x42 interrupt r/c 00 i_vbusok i_activity i_comp_chng i_crc_chk i_alert i_wake i_collision i_bc_lvl 0x43 fifos r/w ( 10 ) 00 write to tx fifo or read from rx fifo repeatedly without address auto increment type c b its usb pd b its general b its notes: 8. do not use registers that are blank. 9. values read from undefined register bits are not defined and invalid. do not write to undefined registers. 10. fifo register is serially read/written without auto address increment.
20 fusb302 t programmable usb type - c controller w/pd table 5. device id - address: 01h - reset value: 0x10 10_ 0000 - type: read bit # name r/w/c size ( b its) description 7:4 version id r 4 device version id 1000 : fusb302 1001 : fusb302 b 1010 : fusb302t 3:2 reserved r 2 do not use 1 :0 revision id r 2 revision history of each version 00 : reva 01 : revb 10 : revc 11 : revd table 6. switches0 - address: 02h - reset value: 0x0000_00 00 - type: read/write bit # name r/w/c size ( b its) description 7 pu_en2 r/w 1 1: apply host pull up current to cc2 pin. 6 pu_en1 r/w 1 1: apply host pull up current to cc1 pin. 5 vconn_cc2 r/w 1 1: turn on the vconn current to cc2 pin. 4 vconn_cc1 r/w 1 1: turn on the vconn current to cc1 pin. 3 meas_cc2 r/w 1 1: use the measure block to monitor or measure the voltage on cc2. 2 meas_cc1 r/w 1 1: use the measure block to monitor or measure the voltage on cc1. 1 pdwn2 r/w 1 1: device pull down on cc2 . 0: n o pull down. 0 pdwn1 r/w 1 1: device pull down on cc1 . 0: n o pull down.
21 fusb302 t programmable usb type - c controller w/pd table 7. switches1 - address: 03h - reset value: 0x0010_0000 - type: read/write bit # name r/w/c size ( b its) description 7 powerrole r/w 1 bit used for constructing the goodcrc acknowledge packet. this bit corresponds to the port power role bit in the message header if an sop packet is received 1: source if sop 0 : sink if sop 6:5 specrev1 : specrev0 r/w 2 bit used for constructing the goodcrc acknowledge packet. these bits correspond to the specification revision bits in the message header 00: revision 1.0 01: revision 2.0 10, 11: do n ot u se 4 datarole r/w 1 bit used for constructing the goodcrc acknowledge packet. this bit corresponds to the port data role bit in the message header . for sop: 1: src 0: snk 3 reserved n/a 1 do not use 2 auto_crc r/w 1 1: starts the transmitter automatically when a message with a good crc is received and automatically sends a goodcrc acknowledge packet back to the relevant sop* 0: feature disabled. 1 txcc2 r/w 1 1: enable bmc transmit driver on cc2 pin. 0 txcc1 r/w 1 1: enable bmc transmit driver on cc1 pin. table 8. measure - address: 04h - reset value: 0x0011_0001 - type: read/write bit # name r/w/c size ( b its) description 7 reserved n/a 1 do not use 6 meas_vbus r/w 1 0: m dac/comparator measurement is controlled by meas_cc* bits. 1: measure vbus with the mdac/comparator. this requires meas_cc* bits to be 0. 5:0 mdac[5:0] r/w 6 measure block dac data input. lsb is equivalent to 42 mv of voltage which is compared to the measured cc voltage. the measured cc is selected by meas_cc2, or meas_cc1 bits. mdac[5:0] meas_vbus=0 meas_vbus=1 unit 00_0000 0. 042 0. 42 0 v 00_0001 0.084 0.840 v 11_0000 2.058 20.58 v 11_0011 2. 184 21.84 v 11_1110 2. 646 26.46 v 11_1111 >2. 688 26.88 v
22 fusb302 t programmable usb type - c controller w/pd table 9. slice - address: 05h - reset value: 0x0110_0000 - type: read/write bit # name r/w/c size ( b its) description 7:6 sdac_hys[1:0] r/w 2 adds hysteresis where there are now two thresholds, the lower threshold which is always the value programmed by sdac[5:0] and the higher threshold that is: 11 : 255 mv hysteresis: higher threshold = (sdac value + 20hex) 10 = 170 mv hysteresis: higher threshold = (sdac value + ahex ) 01 = 85 mv hysteresis: higher threshold = (sdac value + 5) 00 = no hysteresis: higher threshold = sdac value 5:0 sdac[5:0] r/w 6 bmc slicer dac data input. allows for a programmable threshold so as to meet the bmc receive mask under all noise conditions. table 10. control0 - address: 06h - reset value: 0x0010_0100 - type: (see column below) bit # name r/w/c size ( b its) description 7 reserved n/a 1 do not use 6 tx_flush w/c 1 1: self clearing bit to flush the content of the transmit fifo. 5 int_mask r/w 1 1: mask all interrupts. 0: interrupts to host are enabled. 4 reserved n/a 1 do not use 3:2 host_cur[1:0] r/w 2 1: controls the host pull up current enabled by pu_en[2:1]: 00: no current 01: 80 a C default usb power. 10: 180 a C C 0: feature disabled. 0 tx_start w/c 1 1: start transmitter using the data in the transmit fifo. preamble is started first. during the preamble period the transmit data can start to be written to the transmit fifo. self clearing.
23 fusb302 t programmable usb type - c controller w/pd table 11. control1 - address: 07h - reset value: 0x0000_0000 - type: (see column below) bit # name r/w/c size ( b its) description 7 reserved n/a 1 do not use 6 ensop2db r/w 1 1: enable sop_debug (sop double prime debug) packets 0: i gnore sop _debug (sop double prime debug) packets 5 ensop1db r/w 1 1: enable sop?_debug (sop prime debug) packets 0: i gnore sop _debug packets 4 bist_mode2 r/w 1 1: sent bist mode 01s pattern for testing 3 reserved n/a 1 do not use 2 rx_flush w/c 1 1: self clearing bit to flush the content of the receive fifo. 1 ensop2 r/w 1 1: enable sop(sop double prime) packets 0: i gnore sop (sop double prime) packets 0 ensop1 r/w 1 1: enable sop?(sop prime) packets 0: i gnore sop packets table 12. control2 - address: 08h - reset value: 0x0000_0010 - type: (see column below) bit # name r/w/c size (bits) description 7: 6 tog_save_pwr2: tog_save_pwr1 n/a 2 00: dont go into the disable state after one cycle of toggle 01: wait between toggle cycles for t dis time of 40 ms 10: wait between toggle cycles for t dis time of 80 ms 11: wait between toggle cycles for t dis time of 160 ms 5 tog_rd_only r/w 1 1: when toggle=1 only rd values will cause the toggle state machine to stop toggling and trigger the i_toggle interrupt. 0: when toggle=1, rd and ra values will cause the toggle state machine to stop toggling. 4 reserved n/a 1 do not use 3 wake_en r/w 1 1: enable wake detection functionality if the power state is correct 0: disable wake detection functionality 2:1 mode r/w 2 11: enable src polling functionality if toggle=1 10: enable snk polling functionality if toggle=1 01: enable drp polling functionality if toggle=1 00: d o n ot u se 0 toggle r/w 1 1: enable drp, snk or src toggle autonomous functionality 0: disable drp, snk and src toggle functionality
24 fusb302 t programmable usb type - c controller w/pd table 13. control3 - address: 09h - reset value: 0x0000_0110 - type: (see column below) bit # name r/w/c size ( b its) description 7 reserved n/a 1 do not use 6 send_hard _ reset w/c 1 1: send a hard reset packet (highest priority) 0: dont send a soft reset packet 0 : normal operation , all packets are treated as usual. 4 auto_hardreset r/w 1 1: enable automatic hard reset packet if soft reset fail 0: disable automatic hard reset packet if soft reset fail 3 auto_softreset r/w 1 1: enable automatic soft reset packet if retries fail 0: disable automatic soft reset packet if retries fail 2:1 n_retries[1:0] r/w 2 11: three retries of packet (four total packets sent) 10: two retries of packet (three total packets sent) 01: one retry of packet (two total packets sent) 00: no retries (simil ar to disabling auto retry) 0 auto_retry r/w 1 1: enable automatic packet retries if goodcrc is not received 0: disable automatic packet retries if goodcrc not received table 14. mask - address: 0ah - reset value: 0x0000_0000 - type: read/write bit # name r/w/c size ( b its) description 7 m_vbusok r/w 1 1: mask i_vbusok interrupt bit. 0: do not mask. 6 m_activity r/w 1 1: mask interrupt for a transition in cc bus activity. 0: do not mask. 5 m _comp_chng r/w 1 1: mask i_comp_chng interrupt for change is the value of comp, the measure comparator. 0: do not mask. 4 m_crc_chk r/w 1 1: mask interrupt from crc_chk bit. 0: do not mask. 3 m_alert r/w 1 1: mask the i_alert interrupt bit. 0: do not mask. 2 m_wake r/w 1 1: mask the i_wake interrupt bit. 0: do not mask. 1 m_collision r/w 1 1: mask the i_collision interrupt bit. 0: do not mask. 0 m_bc_lvl r/w 1 1: mask a change in host requested current level. 0: do not mask.
25 fusb302 t programmable usb type - c controller w/pd table 15. power - address: 0bh - reset value: 0x0000_0001 - type: read/write bit # name r/w/c size ( b its) description 7: 4 reserved n/a 4 do not use 3:0 pwr[3:0] r/w 4 power enables: pwr[0]: bandgap and wake circuit. pwr[1]: receiver powered and current references for measure block pwr[2]: measure block powered. pwr[3]: enable internal oscillator. table 16. reset - address: 0ch - reset value: 0x0000_0000 - type: write/clear bit # name r/w/c size ( b its) description 7:2 reserved n/a 6 do not use 1 pd_reset w/c 1 1: reset just the pd logic for both the pd transmitter and receiver. 0 sw_res w/c 1 1: reset the fusb302t including the i2c registers to their default values. table 17. ocpreg - address: 0dh - reset value: 0x0000_1111 - type: read/write bit # name r/w/c size ( b its) description 7:4 reserved n/a 4 do not use 3 ocp_range r /w 1 1: ocp range between 100 ma - 800 ma (max_range=800 ma) 0: ocp range between 10 ma - 80 ma (max_range=80 ma) 2:0 ocp_cur2, ocp_cur1, ocp_cur0 r/w 3 111: max_range (see bit definition above for ocp_range) 110: 7*max_range/8 101: 6*max_range/8 100: 5*max_range/8 011: 4*max_range/8 010: 3*max_range/8 001: 2*max_range/8 000: max_range/8
26 fusb302 t programmable usb type - c controller w/pd table 18. maska - address: 0eh - reset value: 0x0000_0000 - type: read/write bit # name r/w/c size ( b its) description 7 m_ocp_temp r /w 1 1: mask the i_ocp_temp interrupt 6 m_togdone r /w 1 1: mask the i_togdone interrupt 5 m_softfail r/w 1 1: mask the i_softfail interrupt 4 m_retryfail r/w 1 1: mask the i_retryfail interrupt 3 m_hardsent r/w 1 1: mask the i_hardsent interrupt 2 m_txsent r/w 1 1: mask the i_txsent interrupt 1 m_softrst r/w 1 1: mask the i_softrst interrupt 0 m_hardrst r/w 1 1: mask the i_hardrst interrupt table 19. maskb - address: 0fh - reset value: 0x0000_0000 - type: read/write bit # name r/w/c size ( b its) description 7:1 reserved n/a 6 do not use 0 m_gcrcsent r/w 1 1: mask the i_gcrcsent interrupt table 20. control4 - address: 00h - reset value: 0x0000_0000 - type: read/write bit # name r/w/c size ( b its) description 7:1 reserved n/a 6 do not use 0 tog_exit_aud r/w 1 1: in auto rd only toggle mode, stop toggle at audio accessory (ra on both cc)
27 fusb302 t programmable usb type - c controller w/pd table 21. status0a - address: 3c h - reset value: 0x0000_0000 - type: read bit # name r/w/c size ( b its) description 7 :6 reserved n/a 2 do not use 5 softfail r 1 1: all soft reset packets with retries have failed to get a goodcrc acknowledge . this status is cleared when a start_tx, txon or send_hard_reset is executed. 4 retryfail r 1 1: all packet retries have failed to get a goodcrc acknowledge . this status is cleared when a start_tx, txon or send_hard_reset is executed. 3:2 power3:power2 r 2 internal power state when logic internals ne eds to control the power state. power3 corresponds to pwr3 bit and p ower2 corresponds to pwr2 bit. the power state is the higher of both pwr[3:0] and {power3, p ower2, pwr[1:0]} so that if one is 03 and the other is f then the internal power state is f. 1 softrst r 1 1: one of the packets received was a soft reset packet 0 hardrst r 1 1: hard reset pd ordered set has been received table 22. status1a - address: 3dh - reset value: 0x0000_0000 - type: read bit # name r/w/c size ( b its) description 7: 6 reserved n/a 2 do not use 5 :3 togss3: togss2: togss1 r 3 0 00: toggle logic running (processor has previously written toggle=1) 0 01: toggle functionality has settled to src on cc1 (stop_ src1 state) 0 10: toggle functionality has settled to src on cc2 (stop_ src2 state) 101: toggle functionality has settled to snkon cc1 (stop_snk1 state) 110: toggle functionality has settled to snkon cc2 (stop_snk2 state) 111: toggle functionality has d etected audioaccessory with vra on both cc1 and cc2 (settles to stop_src1 state) otherwise: not defined (do not interpret) 2 rxsop2db r 1 1: indicates the last packet placed in the rxfifo is type sop_debug (sop double prime debug). sop?_debug (sop prime debug).
28 fusb302 t programmable usb type - c controller w/pd table 23. interrupta - address: 3e h - reset value: 0x0000_0000 - type: read/clear bit # name r/w/c size ( b its) description 7 i_ocp_temp r /c 1 1: interrupt from either a ocp event on one of the vconn switches or an over - temperature event 6 i_togdone r /c 1 1: interrupt indicating the toggle functionality was terminated because a device was detected. 5 i_softfail r /c 1 1: interrupt from automatic soft reset packets with retries have failed 4 i_retryfail r /c 1 1: interrupt from automatic packet retries have failed 3 i_hardsent r /c 1 1: interrupt from successfully sending a hard reset ordered set 2 i_txsent r /c 1 1: interrupt to alert that we sent a packet that was acknowledged with a goodcrc response packet 1 i_softrst r /c 1 1: received a soft reset packet 0 i_hardrst r /c 1 1: received a hard reset ordered set table 24. interruptb - address: 3fh - reset value: 0x0000_0000 - type: read/clear bit # name r/w/c size ( b its) description 7 reserved n/a 6 do not use 0 i_gcrcsent r /c 1 1: sent a goodcrc acknowledge packet in response to an incoming packet that has the correct crc value.
29 fusb302 t programmable usb type - c controller w/pd table 25. status0 - address: 40h - reset value: 0x0000_0000 - type: read bit # name r/w/c size ( b its) description 7 vbus ok r 1 1: interrupt occurs when vbus transitions through vvbusthr . this bit typically is used to recognize port partner during startup. 6 activity r 1 1: transitions are detected on the active cc* line. this bit goes high after a minimum of 3 cc transitions, and goes low with no transitions . 0: inactive. 5 comp r 1 1: measured cc* input is higher than reference level driven from the mdac. 0: measured cc * input is lower than reference level driven from the mdac. 4 crc_chk r 1 1: indicates the last received packet had the correct crc. this bit remains set until the sop of the next packet. 0: packet received for an enabled sop* and crc for the enabled packet received was incorrect 3 alert r 1 1: alert software an error condition has occurred. an alert is caused by: tx_full: the transmit fifo is full. rx_full: the receive fifo is full. see status1 bits 2 wake r 1 1: voltage on cc indicated a device attempting to attach. 0: wake either not enabled (wake_en=0) or no device attached. 1:0 bc_lvl[1:0] r 2 current voltage status of the measured cc pin interpreted as host current levels as follows: 00: < 200 mv 01: > 200 mv, <660 mv 10: >660 mv, <1.23 v 11 :>1.23 v note the software must measure these at an appropriate time, while there is no signaling activity on the selected cc line. bc_lvl is only defined when measure block is on which is when register bits pwr[2]=1 and either meas_cc1=1 or meas_cc2=1 table 26. status1 - address: 41h - reset value: 0x0010_1000 - type: read bit # name r/w/c size ( b its) description 7 rxsop2 r 1 1: indicates the last packet placed in the rxfifo is type sop?? is type sop? conn switch.
30 fusb302 t programmable usb type - c controller w/pd table 27. interrupt - address: 42h - reset value: 0x0000_0000 - type: read/clear bit # name r/w/c size ( b its) description 7 i_vbusok r/c 1 1: interrupt occurs when vbus transitions through 4.5 v. this bit typically is used to recognize port partner during startup. 6 i_activity r/c 1 1: a change in the value of activity of the cc bus has occurred. 5 i _comp_chng r/c 1 1: a change in the value of comp has occurred. indicates selected cc line has tripped a threshold programmed into the mdac. 4 i_crc_chk r/c 1 1: the value of crc_chk newly valid. i.e. the validity of the incoming packet has been checked. 3 i_alert r/c 1 1: alert software an error condition has occurred. an alert is caused by: tx_full: the transmit fifo is full. rx_full: the receive fifo is full. see status1 bits. 2 i_wake r/c 1 1: voltage on cc indicated a device attempting to attach. software must then power up the clock and receiver blocks. 1 i_collision r/c 1 1: when a transmit was attempted, activity was detected on the active cc line. transmit is not done. the packet is received normally. 0 i_bc_lvl r/c 1 1: a change in host requested current lev el has occurred. table 28. fifos - address: 43h - reset value: 0x0000_0000 - type: (see column below) bit # name r/w/c size ( b its) description 7:0 tx/rx token read or write 8 writing to this register writes a byte into the transmit fifo. reading from this register reads from the receive fifo. each byte is a coded token. or a token followed by a fix ed number of packed data byte ( s ee token coding in table 29 ) .
31 fusb302 t programmable usb type - c controller w/pd software model port software interacts with the port chip in two primary ways: ? i 2 c registers ? 8 bit data tokens sent to or received from the fifo register. ? all reserved bits written in the txfifo should be 0 and all reserved bit read from the rxfifo should be ignored. transmit data tokens transmit data tokens provide in-sequence transmit control and data for the transmit logic. note that the token codes, and their equivalent usb pd k-code are not the same. tokens are read one at a time when they reach the end of the tx fifo. i.e., the specified token action is performed before the next token is read from the tx fifo. the tokens are defined as follows: table 29. tokens used in fifo code name size (bytes) description 101x - xxx1 (0xa1) txon 1 alternative method for starting the transmitter with the tx - start bit. this is not a token written to the txfifo but a command much like tx_start but it is more convenient to write it while writing to the txfifo in one contiguous write operation. it is preferred that the txfifo is first written with data and then txon or tx_start is executed. it is expected that a1h will be written for txon not any other bits where x is non - zero such as b1h, bfh, etc 0x12 sop1 1 when reaching the end of the fifo causes a sync - 1 symbol to be transmitted. 0x13 sop2 1 when reaching the end of the fifo causes a sync - 2 symbol to be transmitted. 0x1b sop3 1 when reaching the end of the fifo causes a sync - 3 symbol to be transmitted. 0x15 reset1 1 when reaching the end of the fifo causes a rst - 1 symbol to be transmitted. 0x16 reset2 1 when reaching the end of the fifo causes a rst - 2 symbol to be transmitted. 0x80 packsym 1+n this data token must be immediately followed by a sequence of n packed data bytes. this token is defined by the 3 msb?s being set to 3?b100. the 5 lsb?s are the number of packed bytes being sent. note: n cannot be less than 2 since the m inimum control packet has a header that is 2 bytes and n cannot be greater than 30 since the maximum data packet has 30 bytes (2 byte header + 7 data objects each having 4 bytes) packed data byte s have two 4 bit data fields. the 4 lsb?s are sent first, aft er 4b5b conversion etc in the chip. 0xff jam_crc 1 causes the crc, calculated by the hardware, to be inserted into the transmit stream when this token reaches the end of the tx fifo. 0x14 eop 1 causes an eop symbol to be sent when this token reaches the end of the tx fifo. 0xfe txoff 1 turn off the transmit driver. typically the next symbol after eop.
32 fusb302 t programmable usb type - c controller w/pd receive data tokens receive data tokens provide in-sequence receive control and data for the receive logic. the rxfifo can absorb as many packets as the number of bytes in the rxfifo (80 bytes). the tokens are defined as follows: table 30. tokens used in rxfifo code (in binary) name size ( bytes ) description 111b_bbb b sop 1 first byte of a received packet to indicate that the packet is an sop packet (b is undefined and can be any bit) 110b_bbb b sop1 1 first byte of a received packet to indicate that the packet is an sop? packet and occurs only if ensop1=1 (b is undefined and can be any bit) 101b_bbb b sop2 1 first byte of a received packet to indicate that the packet is an sop? ? packet and occurs only if ensop2=1 (b is undefined and can be any bit) 100b_bbb b sop1db 1 first byte of a received packet to indicate that the packet is an sop? _debug packet and occurs only if ensop1db=1 (b is undefined and can be any bit) 011b_bbb b sop2db 1 first byte of a received packet to indicate that the packet is an sop? ?_debug packet and occurs only if ensop2db=1 (b is undefined and can be any bit) 010b_bb b b / 001b_bb b b / 000b_bb b b do not use 1 these can be used in future versions of this device and should not be relied on to be any special value. (b is undefined and can be any bit)
33 fusb302 t programmable usb type - c controller w/pd reference schematic figure 15. fusb302t reference schematic diagram table 31. recommended component values for reference schematic symbol parameter recommended value unit min . typ. max . c recv cc x receiver capacitance 200 600 pf c bulk vconn source bulk capacitance 10 220 f c vconn vconn decoupling capacitance 0.1 f c vdd1 v dd decoupling capacitance 0.1 f c vdd2 v dd decoupling capacitance 1.0 f r pu i2c pull - up resistors 4.7 k? r pu_int int_n p ull - up resistor 1 .0 4.7 k? v pu i2c pull - up voltage 1.62 1.8 0 1.98 v fusb 302 t
2.43 2.43 1.45 1.45 0.58 0.30 typ 0.50 typ 0.20 0.10 0.05 0.00 0.80 0.70 seating plane c 2.50 2.50 pin #1 ident a b 1.50 1.25 1.50 1.25 0.30 14x 0.50 0.50 0.30 0.18 14x 2.500.05 pin #1 ident 1 3 4 7 8 10 11 14 top view front view land pattern recommendation notes: a. no industry standard applies to this package b. all dimensions are in millimeters c. dimensions and tolerances per asme y14.5m, 2009 d. land pattern recommendation is an existing industry land pattern e. drawing filename: mkt-mlp14drev4 2x 2x bottom view 0.05 c 0.08 c 0.10 c 0.05 c 0.10 m c a b 0.05 m c
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